P R E L I M I N A R Y
AC CHARACTERISTICS
Read-Only Operations
Parameter
Speed Options
JEDEC
tAVAV
Std
Description
Test Setup
70
90
90
90
90
40
30
30
120
Unit
ns
tRC
Read Cycle Time (Note 1)
Min
Max
Max
Max
Max
Max
70
70
70
30
25
25
120
120
120
50
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tACC Address to Output Delay
CE#, OE# = VIL
OE# = VIL
ns
tCE
tOE
tDF
tDF
Chip Enable to Output Delay
ns
Output Enable to Output Delay
ns
Chip Enable to Output High Z (Note 1)
Output Enable to Output High Z (Note 1)
30
ns
30
ns
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First
tAXQX
tOH
Min
Min
Min
0
0
ns
ns
ns
Read
Output Enable Hold
tOEH
Toggle and
Data# Polling
Time (Note 1)
10
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 16 for test specifications.
tRC
Addresses Stable
tACC
Addresses
CE#
tRH
tRH
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
Output Valid
HIGH Z
HIGH Z
Outputs
RESET#
RY/BY#
0 V
21533C-18
Figure 13. Read Operation Timings
Am29DL162C/Am29DL163C
34