D A T A S H E E T
AC CHARACTERISTICS
Erase and Program Operations
Parameter
Speed Options
JEDEC
tAVAV
Std
tWC
tAS
Description
70
80
90
120
Unit
ns
Write Cycle Time (Note 1)
Address Setup Time
Min
70
80
90
120
tAVWL
Min
Min
Min
Min
0
ns
Address Setup Time to OE# low during toggle bit
polling
tASO
tAH
15
45
15
45
15
45
15
50
ns
ns
ns
tWLAX
Address Hold Time
Address Hold Time From CE# or OE# high
during toggle bit polling
tAHT
0
0
0
tDVWH
tWHDX
tDS
tDH
Data Setup Time
Min
Min
Min
35
20
35
20
45
20
50
20
ns
ns
ns
Data Hold Time
tOEPH
Output Enable High during toggle bit polling
Read Recovery Time Before Write
(OE# High to WE# Low)
tGHWL
tGHWL
Min
ns
tELWL
tWHEH
tWLWH
tWHDL
tCS
tCH
CE# Setup Time
Min
Min
Min
Min
Min
Typ
Typ
0
0
ns
ns
ns
ns
ns
CE# Hold Time
tWP
Write Pulse Width
30
30
30
30
35
30
50
30
tWPH
tSR/W
Write Pulse Width High
Latency Between Read and Write Operations
Byte
0
5
7
tWHWH1
tWHWH1 Programming Operation (Note 2)
µs
µs
Word
Accelerated Programming Operation,
Word or Byte (Note 2)
tWHWH1
tWHWH2
tWHWH1
Typ
4
tWHWH2 Sector Erase Operation (Note 2)
Typ
Min
Min
Max
0.7
50
0
sec
µs
tVCS
tRB
VCC Setup Time (Note 1)
Write Recovery Time from RY/BY#
Program/Erase Valid to RY/BY# Delay
ns
tBUSY
90
ns
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
February 26, 2009 21533E6
Am29DL16xD
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