DATA SHEET
Am29BL802C
8 Megabit (512 K x 16-Bit)
CMOS 3.0 Volt-only Burst Mode Flash Memory
DISTINCTIVE CHARACTERISTICS
■
32 words sequential with wrap around (linear
32), bottom boot
■
One 8 Kword, two 4 Kword, one 48 Kword, three
64 Kword, and two 128 Kword sectors
■
Single power supply operation
— Regulated voltage range: 3.0 to 3.6 volt read and
write operations and for compatibility with high
performance 3.3 volt microprocessors
■
Read access times
Burst access times as fast as 17 ns at industrial
temperature range (18 ns at extended
temperature range)
Initial/random access times as fast as 65 ns
■
Alterable burst length via BAA# pin
■
Power dissipation (typical)
— Burst Mode Read: 15 mA @ 25 MHz,
20 mA @ 33 MHz, 25 mA @ 40 MHz
— Program/Erase: 20 mA
— Standby mode, CMOS: 3 µA
■
5 V-tolerant data, address, and control signals
■
Sector Protection
— Implemented using in-system or via
programming equipment
— Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■
Unlock Bypass Program Command
— Reduces overall programming time when
issuing multiple program command sequences
■
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
■
Minimum 100,000 erase cycle guarantee
per sector
■
20-year data retention
■
Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
— Backward-compatible with AMD Am29LV and
Am29F flash memories: powers up in
asynchronous mode for system boot, but can
immediately be placed into burst mode
■
Data# Polling and toggle bits
— Provides a software method of detecting
program or erase operation completion
■
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
■
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
■
Hardware reset pin (RESET#)
— Hardware method to reset the device for reading
array data
■
Package Option
— 56-pin SSOP
This Data Sheet states AMD’s current specifications regarding the Products described herein. This Data Sheet may
be revised by subsequent versions or modifications due to changes in technical specifications.
Publication#
22371
Rev:
C
Amendment:
7
Issue Date:
November 3, 2006
SPANSION [ SPANSION ]
