D A T A S H E E T
AC CHARACTERISTICS
Burst Mode Read
Parameter
Speed Options and Temperature Ranges
65R
70R
I, E
90R
I, E
120R
I, E
JEDEC
Std.
Description
I
E
Unit
Initial Access Time
tIACC
Max
Max
65
70
24
90
26
120
26
ns
LBA# Valid Clock to Output Delay
(See Note)
Burst Access Time
tBACC
17
18
ns
BAA# Valid Clock to Output Delay
tLBAS
tLBAH
tBAAS
LBA# Setup Time
LBA# Hold Time
BAA# Setup Time
Min
Min
Min
Min
6
2
6
2
4
ns
ns
ns
ns
ns
tBAAH BAA# Hold Time
tBDH
tACS
Data Hold Time from Next Clock Cycle Max
Address Setup Time to CLK
(See Note)
Min
6
2
ns
ns
Address Hold Time from CLK
(See Note)
tACH
Min
tOE
Output Enable to Output Valid
Output Enable to Output High Z
Chip Enable to Output High Z
CE# Setup Time to Clock
Max
Max
Min
Min
17
18
24
25
25
6
26
30
30
26
30
30
ns
ns
ns
ns
tOEZ
tCEZ
tCES
20
20
Note: Initial valid data will be output after second clock rising edge of LBA# assertion.
30
Am29BL802C
22371C7 November 3, 2006
SPANSION [ SPANSION ]
