S U P P L E M E N T
AC CHARACTERISTICS
Burst Mode Read
Speed Options and
Temperature Ranges
Description
Parameter
JEDEC
Std.
80R
Unit
Initial Access Time
tIACC
Max
80
ns
LBA# Valid Clock to Output Delay (See Note)
Burst Access Time
tBACC
Max
24
ns
BAA# Valid Clock to Output Delay
tLBAS
tLBAH
tBAAS
LBA# Setup Time
LBA# Hold Time
BAA# Setup Time
Min
Min
Min
Min
Max
6
2
6
2
4
ns
ns
ns
ns
ns
tBAAH BAA# Hold Time
tBDH Data Hold Time from Next Clock Cycle
Address Setup Time to CLK
(See Note)
tACS
Min
Min
6
2
ns
ns
Address Hold Time from CLK
(See Note)
tACH
tOE
Output Enable to Output Valid
Output Enable to Output High Z
Chip Enable to Output High Z
CE# Setup Time to Clock
Max
Max
Min
Min
24
25
25
6
ns
ns
ns
ns
tOEZ
tCEZ
tCES
Note: Initial valid data will be output after second clock rising edge of LBA# assertion.
4
Am29BL162C Known Good Die
SPANSION [ SPANSION ]
