D A T A S H E E T
AC CHARACTERISTICS
Burst Mode Read
Parameter
Speed Options and Temperature Ranges
65R
70R
I, E
90R
I, E
120R
I, E
JEDEC
Std.
Description
I
E
Unit
Initial Access Time
t
Max
Max
65
70
24
90
26
120
26
ns
LBA# Valid Clock to Output Delay
(See Note)
IACC
Burst Access Time
t
17
18
ns
BACC
BAA# Valid Clock to Output Delay
t
LBA# Setup Time
LBA# Hold Time
BAA# Setup Time
BAA# Hold Time
Min
Min
Min
Min
6
2
6
2
4
ns
ns
ns
ns
ns
LBAS
LBAH
BAAS
BAAH
t
t
t
t
Data Hold Time from Next Clock Cycle Max
BDH
Address Setup Time to CLK
(See Note)
t
Min
6
2
ns
ns
ACS
ACH
Address Hold Time from CLK
(See Note)
t
Min
t
Output Enable to Output Valid
Output Enable to Output High Z
Chip Enable to Output High Z
CE# Setup Time to Clock
Max
Max
Min
Min
17
18
24
25
25
6
26
30
30
26
30
30
ns
ns
ns
ns
OE
t
20
20
OEZ
t
CEZ
t
CES
Note: Initial valid data is output after second clock rising edge of LBA# assertion.
July 8, 2005
Am29BL162C
33