P r e l i m i n a r y
AC Characteristics
Program Command Sequence (last two cycles)
Read Status Data
tCSW1
V
IH
CLK
V
IL
tAVSW
tAVHW
AVD
tAVDP
tAS
tAH
Addresses
Data
555h
PA
VA
VA
In
A0h
tDS
Complete
PD
Progress
tDH
CE#
tCH
OE#
WE#
tWP
tWHWH1
tCS
tWPH
tWC
tVCS
VCC
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.
2. “In progress” and “complete” refer to status of program operation.
3. A20–A12 are don’t care during command sequence unlock cycles.
4. The Asynchronous programming operation is independent of the Set Device Read Mode bit in the Burst Mode
Configuration Register.
Figure 21. Asynchronous Program Operation Timings
58
Am29BDS320G
27243B1 October 1, 2003