DATA SHEET
Am29BDS128H/Am29BDS640H
128 or 64 Megabit (8 M or 4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
The Am29BDS640H has been retired and is not recommended for designs. For new designs, S29WS064K supersedes Am29BDS640H. Please refer to the S29WS-K family data sheet for
specifications and ordering information. The Am29BDS128H is available and is not affected by this revision.
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
HARDWARE FEATURES
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Single 1.8 volt read, program and erase (1.65 to 1.95 volt)
Manufactured on 0.13 µm process technology
VersatileIO™ (VIO) Feature
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Handshaking feature
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Provides host system with minimum possible latency by
monitoring RDY
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Reduced Wait-state handshaking option further reduces
initial access cycles required for burst accesses beginning on
even addresses
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Device generates data output voltages and tolerates data
input voltages as determined by the voltage on the VIO pin
1.8V compatible I/O signals
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Hardware reset input (RESET#)
Hardware method to reset the device for reading array data
WP# input
Write protect (WP#) function allows protection of the four
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Simultaneous Read/Write operation
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Data can be continuously read from one bank while
executing erase/program functions in other bank
Zero latency between read and write operations
Four bank architecture:
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highest and four lowest 4 kWord boot sectors, regardless of
sector protect status
128 Mb has 16/48/48/16 Mbit banks
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Persistent Sector Protection
64 Mb has 8/24/24/8 Mbit banks
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A command sector protection method to lock combinations of
individual sectors and sector groups to prevent program or
erase operations within that sector
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Programable Burst Interface
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2 Modes of Burst Read Operation
Linear Burst: 8, 16, and 32 words with wrap-around
Continuous Sequential Burst
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Sectors can be locked and unlocked in-system at VCC level
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Password Sector Protection
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SecSiTM (Secured Silicon) Sector region
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A sophisticated sector protection method to lock
combinations of individual sectors and sector groups to
prevent program or erase operations within that sector using
a user-defined 64-bit password
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Up to 128 words accessible through a command sequence
Up to 64 factory-locked words
Up to 64 customer-lockable words
Sector Architecture
ACC input: Acceleration function reduces programming
time; all sectors locked when ACC = VIL
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Banks A and D each contain both 4 Kword sectors and 32
Kword sectors; Banks B and C contain ninety-six 32 Kword
sectors
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CMOS compatible inputs, CMOS compatible outputs
Low VCC write inhibit
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Sixteen 4 Kword boot sectors
Half of the boot sectors are at the top of the address range;
half are at the bottom of address range
SOFTWARE FEATURES
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Minimum 1 million erase cycle guarantee per sector
20-year data retention at 125°C
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Supports Common Flash Memory Interface (CFI)
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Software command set compatible with JEDEC 42.4
standards
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Reliable operation for the life of the system
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80-ball FBGA package (128 Mb) or 64-ball FBGA (64 Mb)
package
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Backwards compatible with Am29F and Am29LV families
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Data# Polling and toggle bits
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Provides a software method of detecting program and erase
operation completion
PERFORMANCE CHARCTERISTICS
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Read access times at 75/66/54 MHz (CL=30 pF)
Erase Suspend/Resume
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Burst access times of 9.3/11/13.5 ns at industrial
temperature range
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Suspends an erase operation to read data from, or program
data to, a sector that is not being erased, then resumes the
erase operation
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Synchronous latency of 49/56/69 ns
Asynchronous random access times of 45/50/55 ns
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Unlock Bypass Program command
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Power dissipation (typical values, CL = 30 pF)
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Reduces overall programming time when issuing multiple
program command sequences
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Burst Mode Read: 10 mA
Simultaneous Operation: 25 mA
Program/Erase: 15 mA
Burst Suspend/Resume
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Suspends a burst operation to allow system use of the
address and data bus, than resumes the burst at the previous
state
Standby mode: 0.2 µA
Publication# 27024
Rev: B Amendment: 3
Issue Date: May 10, 2006