欢迎访问ic37.com |
会员登录 免费注册
发布采购

AM29BDS64HD9VMI 参数 Datasheet PDF下载

AM29BDS64HD9VMI图片预览
型号: AM29BDS64HD9VMI
PDF下载: 下载PDF文件 查看货源
内容描述: 128或64兆比特( 8 M或4米×16位) CMOS 1.8伏只同步读/写,突发模式闪存 [128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory]
分类和应用: 闪存
文件页数/大小: 89 页 / 1587 K
品牌: SPANSION [ SPANSION ]
 浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第1页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第2页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第4页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第5页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第6页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第7页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第8页浏览型号AM29BDS64HD9VMI的Datasheet PDF文件第9页  
DATA SHEET  
Am29BDS128H/Am29BDS640H  
128 or 64 Megabit (8 M or 4 M x 16-Bit)  
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory  
The Am29BDS640H has been retired and is not recommended for designs. For new designs, S29WS064K supersedes Am29BDS640H. Please refer to the S29WS-K family data sheet for  
specifications and ordering information. The Am29BDS128H is available and is not affected by this revision.  
DISTINCTIVE CHARACTERISTICS  
ARCHITECTURAL ADVANTAGES  
HARDWARE FEATURES  
Single 1.8 volt read, program and erase (1.65 to 1.95 volt)  
Manufactured on 0.13 µm process technology  
VersatileIO™ (VIO) Feature  
Handshaking feature  
Provides host system with minimum possible latency by  
monitoring RDY  
Reduced Wait-state handshaking option further reduces  
initial access cycles required for burst accesses beginning on  
even addresses  
Device generates data output voltages and tolerates data  
input voltages as determined by the voltage on the VIO pin  
1.8V compatible I/O signals  
Hardware reset input (RESET#)  
Hardware method to reset the device for reading array data  
WP# input  
Write protect (WP#) function allows protection of the four  
Simultaneous Read/Write operation  
Data can be continuously read from one bank while  
executing erase/program functions in other bank  
Zero latency between read and write operations  
Four bank architecture:  
highest and four lowest 4 kWord boot sectors, regardless of  
sector protect status  
128 Mb has 16/48/48/16 Mbit banks  
Persistent Sector Protection  
64 Mb has 8/24/24/8 Mbit banks  
A command sector protection method to lock combinations of  
individual sectors and sector groups to prevent program or  
erase operations within that sector  
Programable Burst Interface  
2 Modes of Burst Read Operation  
Linear Burst: 8, 16, and 32 words with wrap-around  
Continuous Sequential Burst  
Sectors can be locked and unlocked in-system at VCC level  
Password Sector Protection  
SecSiTM (Secured Silicon) Sector region  
A sophisticated sector protection method to lock  
combinations of individual sectors and sector groups to  
prevent program or erase operations within that sector using  
a user-defined 64-bit password  
Up to 128 words accessible through a command sequence  
Up to 64 factory-locked words  
Up to 64 customer-lockable words  
Sector Architecture  
ACC input: Acceleration function reduces programming  
time; all sectors locked when ACC = VIL  
Banks A and D each contain both 4 Kword sectors and 32  
Kword sectors; Banks B and C contain ninety-six 32 Kword  
sectors  
CMOS compatible inputs, CMOS compatible outputs  
Low VCC write inhibit  
Sixteen 4 Kword boot sectors  
Half of the boot sectors are at the top of the address range;  
half are at the bottom of address range  
SOFTWARE FEATURES  
Minimum 1 million erase cycle guarantee per sector  
20-year data retention at 125°C  
Supports Common Flash Memory Interface (CFI)  
Software command set compatible with JEDEC 42.4  
standards  
Reliable operation for the life of the system  
80-ball FBGA package (128 Mb) or 64-ball FBGA (64 Mb)  
package  
Backwards compatible with Am29F and Am29LV families  
Data# Polling and toggle bits  
Provides a software method of detecting program and erase  
operation completion  
PERFORMANCE CHARCTERISTICS  
Read access times at 75/66/54 MHz (CL=30 pF)  
Erase Suspend/Resume  
Burst access times of 9.3/11/13.5 ns at industrial  
temperature range  
Suspends an erase operation to read data from, or program  
data to, a sector that is not being erased, then resumes the  
erase operation  
Synchronous latency of 49/56/69 ns  
Asynchronous random access times of 45/50/55 ns  
Unlock Bypass Program command  
Power dissipation (typical values, CL = 30 pF)  
Reduces overall programming time when issuing multiple  
program command sequences  
Burst Mode Read: 10 mA  
Simultaneous Operation: 25 mA  
Program/Erase: 15 mA  
Burst Suspend/Resume  
Suspends a burst operation to allow system use of the  
address and data bus, than resumes the burst at the previous  
state  
Standby mode: 0.2 µA  
Publication# 27024  
Rev: B Amendment: 3  
Issue Date: May 10, 2006  
 复制成功!