AC CHARACTERISTICS
Parameter Symbols
Am27C64
JEDEC Standard
Description
Address to Output Delay
Test Setup
CE#,
-45 -55 -70 -90 -120 -150 -200 -255 Unit
t
t
t
Max 45
55
55
35
70
70
40
90 120 150 200 250 ns
90 120 150 200 250 ns
AVQV
ELQV
GLQV
ACC
OE# = V
IL
t
Chip Enable to Output Delay OE# = V Max 45
CE
OE
IL
Output Enable to Output
Delay
t
t
CE# = V Max 30
40
25
50
30
50
30
50
30
50
30
ns
ns
IL
Chip Enable High or Output
Enable High to Output High Z,
Whichever Occurs First
t
t
t
EHQZ
GHQZ
DF
Max 25
25
0
25
0
(Note 2)
Output Hold Time from
Addresses, CE# or OE#,
Whichever Occurs First
t
t
Min
0
0
0
0
0
0
ns
AXQX
OH
Caution: Do not remove the device from (or insert it into) a socket or board that has V or V applied.
PP
CC
Notes:
1. V must be applied simultaneously or before V , and removed simultaneously or after V .
PP
CC
PP
2. This parameter is sampled and not 100% tested.
3. Switching characteristics are over operating range, unless otherwise specified.
4. See Figure 3 and Table 1 for test specifications.
SWITCHING WAVEFORMS
2.4
2.0
0.8
2.0
0.8
Addresses
0.45
Addresses Valid
CE#
OE#
t
CE
t
(Note 2)
DF
t
OE
t
ACC
t
OH
(Note 1)
High Z
High Z
Output
Valid Output
11419E-9
Notes:
1. OE# may be delayed up to t
– t after the falling edge of the addresses without impact on t .
ACC
ACC
OE
2. t is specified from OE# or CE#, whichever occurs first.
DF
PACKAGE CAPACITANCE
CDV028
PL 032
Typ Max
PD 028
Parameter
Symbol
Parameter
Description
Test Conditions
Typ
Max
10
Typ
Max
10
Unit
pF
C
Input Capacitance
Output Capacitance
V
V
= 0
8
6
8
10
12
5
8
IN
IN
C
= 0
11
14
10
pF
OUT
OUT
Notes:
1. This parameter is only sampled and not 100% tested.
2. T = +25°C, f = 1 MHz.
A
10
Am27C64
SPANSION [ SPANSION ]
