D a t a S h e e t
5.2
5.2.1
Connection Diagrams
CellularRAM Based Pinout
84-ball Fine-Pitch Ball Grid Array
CellularRAM-based Pinout (Top View, Balls Facing Down)
Legend
A10
A1
DNU
DNU
B2
B3
RFU
C3
A7
D3
A6
E3
B4
CLK
C4
B5
F2-CE#
C5
B6
RFU
C6
B7
RFU
C7
B8
RFU
C8
B9
RFU
C9
Shared
AVD#
C2
F-WP#
D2
Flash Shared only
RFU
D9
R-LB#
D4
ACC
D5
WE#
D6
A8
A11
D8
D7
1st Flash only
2nd Flash only
A3
R-UB# F-RST#
RFU
E6
A19
E7
A12
E8
A15
E9
E2
E4
A18
F4
E5
RDY
F5
A2
F2
A1
G2
A0
A5
F3
A20
F6
A9
A13
F8
A21
F9
F7
RAM only
A4
A17
G4
A10
G7
A14
G8
A22
G9
RFU
G5
A23
G6
G3
VSS
DQ1
RFU
RFU
DQ6
RFU
A16
H2
H3
H4
H5
H6
H7
H8
H9
F1-CE# OE#
DQ9
DQ3
DQ4
DQ13
DQ15
R-CRE
J9
J2
J3
J4
DQ10
K4
J5
J6
J7
J8
R-CE1#
DQ0
F-VCC
R-VCC
DQ12
DQ7
VSS
K2
K8
K3
K5
K7
K6
RFU
L6
K9
DQ14
DQ8
DQ2
DQ5
RFU
DQ11
RFU
L2
L3
L4
L5
L7
L8
L9
RFU
RFU
RFU
F-VCC
RFU
RFU
RFU
RFU
M10
DNU
M1
DNU
Notes:
1. In MCPs based on a single S29WS256N (S71WS256N), ball B5 is RFU. In MCP's based on two S29WS256N (S71WS512), ball B5 is
F2-CE#.
2. Addresses are shared between Flash and RAM depending on the density of the pSRAM.
MCP
Flash-only Addresses
Shared Addresses
A20-A0
S71WS128NB0
S71WS128NC0
S71WS256NC0
S71WS256ND0
S71WS512NC0
S71WS512ND0
A22-A21
A22
A21-A0
A23 – A22
A23
A21 – A0
A22 – A0
A21-A0
A23 – A22
A23
A22-A0
6
S71WS-N
S71WS-N_00_A7 April 4, 2008
SPANSION [ SPANSION ]
