CXD2510Q
§3-8. Asymmetry Compensation
Fig. 3-14 shows the block diagram and circuit example.
D2510
28
ASYE
ASYO
27
R1
RF
24
R1
R1
R1
R2
ASYI
26
25
BIAS
R1
R2
2
5
=
Fig. 3-14. Example of an Asymmetry Compensation Application Circuit
§3-9. Playback Speed
In the CXD2510Q, the following playback modes can be selected through different combinations of the
crystal, XTSL pin, double-speed command (DSPB), VCO selection command (VCOSEL) and command
transfer rate selector (ASHS). Also, the minimum operating voltage changes according to the playback mode.
(See the Recommended Operating Conditions.)
Playback modes
Mode
X'tal
XTSL
DSPB VCOSEL ASHS Playback speed
Error correction
1
2
3
4
5
6
7
768Fs
768Fs
768Fs
768Fs
384Fs
384Fs
384Fs
1
1
0
0
0
0
1
0
1
0
1
0
1
1
0/1
0/1
1
0
0
1
1
0
0
0
× 1
× 2
× 2
× 4
× 1
× 2
× 1
C1: double; C2: quadruple
C1: double; C2: double
C1: double; C2: quadruple
C1: double; C2: double
C1: double; C2: quadruple
C1: double; C2: double
C1: double; C2: double
1
0/1
0/1
0/1
However, Fs = 44.1kHz.
– 46 –
SONY [ SONY CORPORATION ]
