CXD1199AQ
Pin Description
Pin No.
1
Symbol
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
I/O
I
Description
D0
D1
Sub CPU data bus
Sub CPU data bus
Power supply (+5 V)
GND
2
3
VDD
4
GND
D2
5
Sub CPU data bus
Sub CPU data bus
Sub CPU data bus
Sub CPU data bus
Sub CPU data bus
Sub CPU data bus
6
D3
7
D4
8
D5
9
D6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
D7
XCS
XRD
XWR
XINT
GND
A0
IC select negative logic signal from sub CPU
I
Sub CPU strobe negative logic signal to read this IC internal register
I
Sub CPU strobe negative logic signal to write this IC internal register
O
Interrupt request negative logic signal from IC to sub CPU
—
I
GND
Sub CPU address
A1
I
Sub CPU address
A2
I
Sub CPU address
A3
I
Sub CPU address
A4
I
Sub CPU address
TD0
XHRS
XHCS
HA0
HA1
HINT
XHRD
VDD
I/O
O
Test I/O
Negative logic signal indicating that IC has been reset from host; open drain output
I
IC select negative logic signal from host
I
Host address signal
I
Host address signal
O
Interrupt request negative logic signal to host; open drain output
I
Host strobe negative logic signal to read this IC internal register
—
—
I
Power supply (+5 V)
GND
XHWR
HD0
HD1
HD2
HD3
HD4
GND
Host strobe negative logic signal to read this IC internal register
I/O
I/O
I/O
I/O
I/O
Host data bus
Host data bus
Host data bus
Host data bus
Host data bus
—3—
SONY [ SONY CORPORATION ]
