CXA3067M
Description of PLL Block
1. The followings “channel No.” can be selected through the combination of the conditions of pins 1, 29 and 30
(FSET 1; 2; 3).
FSET conditions have 3 states (OPEN, Hi, Low).
Channel Selection
Local
OSC frequency
[MHz]
Receiving
frequency
[MHz]
Channel No.
FSET 1
FSET 2
FSET 3
1
2
42.65
53.55
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
L
83.70
73.00
L
OPEN
3
98.20
87.50
H
OPEN
4
100.00
108.20
117.20
117.80
119.20
133.40
139.20
168.70
180.20
211.25
219.10
312.70
89.30
OPEN
L
5
97.50
L
L
6
106.50
128.50
108.50
122.70
128.50
158.00
169.50
221.95
229.80
302.00
H
L
7
OPEN
H
8
L
H
9
H
H
OPEN
OPEN
OPEN
L
10
11
12
13
14
15
OPEN
L
L
H
OPEN
L
L
L
L
L
H
L
L
Note) OPEN : No connect
L : Connect to GND
H : Connect to VCC
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