CXA2555Q
Mirror Circuit
The mirror circuit performs peak and bottom hold after RFI signal has been amplified. The peak hold is
executed with the time constant which follows the traverse signal of 100kHz for L/L mode (both of Pins 23 and
24 are connected to GND) and maximum 600kHz (adjustable with the DC voltage on Pin 17) for L/H, H/L, H/H
modes. The bottom hold is executed with the time constant which follows the rotation cycle envelope
fluctuation.
Mirr
Hold
Amp
1.0V
3.125V
44k
51k
Vc
Vc
39k
80k
CP
18
Vc
44p
10p
22k
18k
80k
80k
RFI
H
I
0.33µ
Peak &
Bottom
Hold
G
31
K
J
Vc
Mirr Amp
Mirr
Dif Amp
Open only
20k
80k
Mirr
Comparator
for L/L mode
RFO
1.3V
Vcc
19
17
MIRR T
MIRR
RFO
0V
0V
G
(RFI)
H
(PEAK HOLD)
0V
0V
I
(BOTTOM HOLD)
J
K
(MIRROR HOLD)
H
L
MIRR
The mirror signal is output by comparing to the signal K (2/3 level of the J peak value which is peak-held with a
large time constant) where the difference of hold signals H and I is obtained. The mirror output is low for tracks
on the disc and high for the area between tracks (the mirror areas). In addition, a high signal is output when a
defect is detected. The mirror hold time constant must be sufficiently large in comparison with the traverse
signal.
– 17 –
SONY [ SONY CORPORATION ]
