CXA2542AR
Focus OK Circuit
RF
VCC
DEFECT
RF_O
RF_I
20k
31
30
V4 44k
C5
0.01µ
× 1
VG
FOK
25
15k
56k
0.63V
LPC MIRR
FOCUS OK AMP
FOCUS OK
COMPARATOR
The focus OK circuit creates the timing window okaying the focus servo from the focus search state.
The HPF output is obtained at Pin 30 from Pin 31 (RF signal), and the LPF output (opposite phase) of the
focus OK amplifier output is also obtained.
V4 is set in V3=V4 to cancel V3 of the RF amplifier voltage VRFO.
The focus OK output is inverted when VRFI – VRFO ≈ –0.51V.
Note that, C5 determines the time constant of the HPF for the mirror circuit and the LPF of the focus OK
amplifier. Ordinarily, with a C5 equal to 0.01µF selected, the fc is equal to 1kHz, and block error rate
degradation brought about by RF envelope defects caused by scratched discs can be prevented.
Defect circuit
After differentiated with the capacitance coupling and then inverted, the RF_O signal is bottom held by means
of the long and short time constants.
The short time-constant bottom hold responds to a disc mirror defect in excess of 0.1ms.
The long time-constant bottom hold keeps the mirror level prior to the defect and shifts the level.
The long and short time-constant signals are compared to generate the mirror defect detection signal.
Be sure to disable DFCT ($34X) during focus search because the focus drive waveform is muted.
0.068µ
CC1
27
CC2
26
DFCT2
a
FOK
FLIP
FLOP
SENS2
24
RF
b
c
× 2
SENS
23 SENS1
SELECTOR
e
43k
DEFECT AMP
d
DFCT1
DEFECT SW
DEFECT COMPARATOR
f
DEFECT BOTTOM
HOLD
30
CB
0.01µ
INTERRUPTION
COMPARATOR
–0.5V
RFO
a
b
DEFECT
AMP
BOTTOM
HOLD (1)
solid line
d
BOTTOM
HOLD (2)
broken line
c
H
e
f
SENS1
INT
L
H
L
– 26 –
SONY [ SONY CORPORATION ]
