CXA1720Q
Pin Description
(Ta=25 °C, VCC=5 V)
Pin
Symbol
No.
Pin voltage
—
Equivalent circuit
Description
1
2
3
POWER ON
Reduced voltage detection output.
Vcc
This is an open collector that outputs a low signal
when VCC is below the specified value.
100k
1
A.GND
Vcc
WRITE
DATA
—
Write data input.
This pin is a Schmitt-type input and is triggered
when the logical voltage goes from high to low.
1k
2
2.3V
A.GND
READ
DATA
—
Read data output.
Vcc
This pin is active when the logical voltage of the
Write gate signal and the Erase gate signal is high.
140
3
D.GND
4
5
6
7
WRITE
CURRENT
WRITE
GATE
—
—
—
—
Write current control. The Write current is
increased when the logical voltage is low.
Write gate signal input. The Write system is active
when the logical voltage is low.
ERASE
GATE
Erase gate signal input. The Erase system is
active when the logical voltage is low.
SIDE1
Head side switching signal input. The HEAD1
system is active when the logical voltage is low,
and the HEAD0 system is active when the logical
voltage is high, but only when the logical voltage
for the Write gate and the Erase gate is high.
Filter inner track/outer track mode control. Inner
track mode is selected when the logical voltage is
Vcc
100k
8
9
4
5
6
7
1k
8
9
FILTER
—
—
—
20
2.1V
A.GND low.
Filter, time domain filter and Write current 1M/2M
CONTROL
HIGH
DENSITY
mode control. 2M mode is selected when the
logical voltage is low.
20
HIGH
GAIN
Pre-amplifier voltage gain selection. Gain of 100x
is selected when the logical voltage is high; gain of
200x is selected when the logical voltage is low.
—3—
SONY [ SONY CORPORATION ]
