CXA1720Q
Application Circuit (for 1M/2M devices)
PREAMP
OUT
CREF
0.1µ
HEAD HEAD
HEAD
0A
FILTER
OUT A
HEAD
0B
HIGH
GAIN
1A
1B
VREF
24
23
22
21
20
19
18
17
FILTER
OUT B
W/C 1SET
PREAMP
25
26
27
28
29
30
31
32
16
CB
3300P
RW1
CA
FILTER
DIFF+LPF
(BPF)
3300P
15
14
13
12
11
10
9
W/C 1COMP
COMP
IN B
W/C 2
SET
COMP
IN A
RW2
WRITE
DRIVER
A.GND
W/C 2
COMP
RA
27k
MMVA
D.GND
ERASE
DRIVER
RF
ERASE
OUT 0
FILTER
SET
3.2k
RE0
RE1
ERASE
OUT 1
Vcc
POWER
MONITOR
CONTROL
LOGIC
5V
HIGH
DENSITY
POWER
SAVE
1
2
3
4
5
6
7
8
SIDE 1
POWER WRITE
ON DATA
READ
WRITE
WRITE ERASE
GATE
FILTER
CONTROL
DATA CURRENT GATE
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
—16—
SONY [ SONY CORPORATION ]
