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SN8P26042A 参数 Datasheet PDF下载

SN8P26042A图片预览
型号: SN8P26042A
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Micro-Controller]
分类和应用: 微控制器
文件页数/大小: 101 页 / 733 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8P2604A  
8-Bit Micro-Controller  
If TC1R is changing in the program processing, the PWM waveform will became as following diagram.  
TC1C < TC1R  
PWM Low > High  
TC1C > = TC1R  
PWM High > Low  
TC1C overflow  
and TC1IRQ set  
Update New TC1R!  
Update New TC1R!  
Old TC1R < TC1C < New TC1R  
New TC1R < TC1C < Old TC1R  
Old TC1R  
New TC1R  
New TC1R  
Old TC1R  
0xFF  
TC1C Value  
0x00  
PWM1 Output  
1
2
3
4
5
Period  
1st PWM  
Update PWM Duty  
2nd PWM  
Update PWM Duty  
3th PWM  
In period 2 and period 4, new Duty (TC1R) is set, but the PWM output waveform of period 2 and period 4 are wrong. In  
period 2, the new TC1R value is greater than old TC1R value. If setting new TC1R is after PWM output “low”, system is  
getting TC1C < TC1R result and making PWM output “high”. There are two high level periods in the cycle, and the  
waveform is unexpected. Until next cycle, PWM outputs correct duty. In period 4, the new TC1R value is smaller than  
the old TC1R value. If setting new TC1R is before PWM output “low”, system is getting TC1CTC1R result and  
making PWM output “low”. In the cycle, the high duty is shorter than last cycle and longer than correct cycle. It is an  
unexpected PWM output.  
Though the wrong waveforms only exist in one cycle, it is still a problem for precise PWM application and might make  
outside loading operations error. The solution is to load new TC1R after TC1 timer overflow. Using TC1IRQ status to  
determine TC1 timer is overflow or not. When TC1IRQ becomes “1”, to set the new TC1R value into TC1R buffer, and  
the unexpected PWM output is resolved.  
Example: Using TC1 interrupt function to set new TC1R value for changing PWM duty.  
MAIN:  
B0MOV  
TC1RBUF, A  
; Load new PWM duty setting value into TC1RBUF.  
INT_SER:  
; Push routine to save ACC and PFLAG to buffers.  
; When TC1 Interrupt occurs, update TC1R.  
B0BTS1  
JMP  
B0MOV  
B0MOV  
FTC1IRQ  
INT_SER90  
A, TC1RBUF  
TC1R, A  
INT_SER90:  
; Pop routine to load ACC and PFLAG from buffers.  
RETI  
SONiX TECHNOLOGY CO., LTD  
Page 88  
Version 0.3  
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