SN8P2740 Series
ADC, OP-amp, Comparator 8-Bit Micro-Controller
Example: Set P4.1 to be general purpose input mode. P4CON.1 must be set as “0”.
; Check GCHS and CHS[2:0] status.
B0BCLR
B0BCLR
FGCHS
;If CHS[2:0] point to P4.1 (CHS[2:0] = 001B), set GCHS=0
;If CHS[2:0] don’t point to P4.1 (CHS[2:0] ≠ 001B), don’t
care GCHS status.
; Clear P4CON.
P4CON.1
P4M.1
; Enable P4.1 digital function.
; Set P4.1 as input mode.
; Enable P4.1 input mode.
B0BCLR
Example: Set P4.1 to be general purpose output. P4CON.1 must be set as “0”.
; Check GCHS and CHS[2:0] status.
B0BCLR
FGCHS
;If CHS[2:0] point to P4.1 (CHS[2:0] = 001B), set GCHS=0.
;If CHS[2:0] don’t point to P4.1 (CHS[2:0] ≠ 001B), don’t
care GCHS status.
; Clear P4CON.
B0BCLR
P4CON.1
; Enable P4.1 digital function.
; Set P4.1 output buffer to avoid glitch.
B0BSET
P4.1
; Set P4.1 buffer as “1”.
; Set P4.1 buffer as “0”.
; or
B0BCLR
P4.1
; Enable P4.1 output mode.
B0BSET
P4M.1
; Set P4.1 as input mode.
P4.0 is shared with general purpose I/O, ADC input (AIN0) and ADC external high reference voltage input. AVREFH
flag of ADM register is external ADC high reference voltage input control bit. If AVREFH is enabled, P4.0 general
purpose I/O and ADC analog input (AIN0) functions are disabled. P4.0 pin is connected to ADC high reference voltage
directly.
Note: For P4.0 general purpose I/O and AIN0 functions, AVREFH must be set as “0”.
Example: Set P4.0 to be general purpose input mode. AVREFH and P4CON.0 bits must be set as “0”.
; Check AVREFH status.
B0BTS0
FAVREFH
; Check AVREFH = 0.
B0BCLR
FAVREFH
; AVREFH = 1, clear it to disable external ADC high
reference input.
; AVREFH = 0, execute next routine.
; Check GCHS and CHS[2:0] status.
B0BCLR
FGCHS
;If CHS[2:0] point to P4.0 (CHS[2:0] = 000B), set GCHS=0
;If CHS[2:0] don’t point to P4.0 (CHS[2:0] ≠ 000B), don’t
care GCHS status.
; Clear P4CON.
B0BCLR
P4CON.0
P4M.0
; Enable P4.0 digital function.
; Set P4.0 as input mode.
; Enable P4.0 input mode.
B0BCLR
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