SN8P2740 Series
ADC, OP-amp, Comparator 8-Bit Micro-Controller
11.3 COMPARATOR 2 SPECIAL FUCNITON
Besides normal comparator function, comparator 2 builds in a special mode to shrink TC0 pulse width through
increasing TC0R register. The special mode is to trigger increasing TC0R register and TC0 pulse width will be shrunk
through comparator output edge and controlled by CM2SF bit. When CM2SF=1, comparator 2 special mode is enabled.
If comparator 2 output trigger condition occurs, TC0R register increases 1 to shrink TC0 pulse width.
Step 1: When comparator 2 first trigger occurs, TC0R + 1 once to shrink TC0 pulse width. TC0 pulse width reduces a
unit time automatically. The hardware checks comparator 2 high tension status at the end of one TC0 pulse signal‟s
cycle. If the comparator output status exchanges, to expand TC0 pulse width through increasing TC0R register by
program.
CM0P
CM0N
Normal TC0
Pulse Generator
At end of one TC0 pulse signal‟s cycle to
check comparator 2 status exchanging.
CM2P
Comparator Trigger!
TC0R+1.
CM2N
TC0 Pulse Generator
Pulse width keeps last period.
TC0R+1 pulse width.
Step 2: If comparator output status doesn‟t exchange, TC0R + 1 at the end of one TC0 pulse signal‟s cycle and outputs
the new pulse until comparator 2 output status exchanges.
CM0P
CM0N
Normal TC0
Pulse Generator
At the end of one TC0 pulse signal‟s cycle to check
comparator 2 status not exchanging. TC0R+1 again.
High tension!
At the end of one TC0 pulse signal‟s cycle to
check comparator 2 status exchanging.
CM2P
High tension!
TC0R+1.
CM2N
TC0 Pulse Generator
Pulse width keeps last period.
TC0R+1 pulse width.
TC0R+2 pulse width.
Note: If TC0R is increased to 0xFF, TC0R will keep 0xFF and not increase again, even the comparator
output status never occurs exchanging.
SONiX TECHNOLOGY CO., LTD
Page 104
Version 2.0
SONIX [ SONIX TECHNOLOGY COMPANY ]
