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SN8P27411SDG 参数 Datasheet PDF下载

SN8P27411SDG图片预览
型号: SN8P27411SDG
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, OP-amp, Comparator 8-Bit Micro-Controller]
分类和应用:
文件页数/大小: 136 页 / 3074 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8P2740 Series  
ADC, OP-amp, Comparator 8-Bit Micro-Controller  
8.3.2 TC0 TIMER OPERATION  
TC0 timer is controlled by TC0ENB bit. When TC0ENB=0, TC0 timer stops. When TC0ENB=1, TC0 timer starts to  
count. Before enabling TC0 timer, setup TC0 timers configurations to select timer function modes, e.g. basic timer,  
interrupt functionTC0C increases 1by timer clock source. When TC0 overflow event occurs, TC0IRQ flag is set  
as 1to indicate overflow and cleared by program. The overflow condition is TC0C count from full scale (0xFF) to zero  
scale (0x00). In difference function modes, TC0C value relates to operation. If TC0C value changing effects operation,  
the transition of operations would make timer function error. So TC0 builds in double buffer to avoid these situations  
happen. The double buffer concept is to flash TC0C during TC0 counting, to set the new value to TC0R (reload buffer),  
and the new value will be loaded from TC0R to TC0C after TC0 overflow occurrence automatically. In the next cycle,  
the TC0 timer runs under new conditions, and no any transitions occur. The auto-reload function is no any control  
interface and always actives as TC0 enables. If TC0 timer interrupt function is enabled (TC0IEN=1), the system will  
execute interrupt procedure. The interrupt procedure is system program counter points to interrupt vector (ORG 0008H)  
and executes interrupt service routine after TC0 overflow occurrence. Clear TC0IRQ by program is necessary in  
interrupt procedure. TC0 timer can works in normal mode, slow mode and green mode. But in green mode, TC0 keep  
counting, set TC0IRQ and outputs PWM, but cant wake-up system.  
Clock  
Source  
...  
...  
...  
...  
0x00  
or TC0R  
TC0C  
0x01  
0x02  
0x03  
0xFE  
0xFF  
TC0R  
TC0IRQ  
TC0 timer overflows. TC0IRQ set as “1”.  
Reload TC0C from TC0R automatically.  
TC0IRQ is cleared by program.  
TC0 provides different clock sources to implement different applications and configurations. TC0 clock source includes  
Fcpu (instruction cycle) and Fhosc (high speed oscillator) controlled by TC0CKS bit. TC0CKS bit selects the clock  
source is from Fcpu or Fhosc. If TC0CKS=0, TC0 clock source is Fcpu through TC0rate[2:0] pre-scalar to decide  
Fcpu/2~Fcpu/256. If TC0CKS=1, TC0 clock source is Fhosc through TC0rate[2:0] pre-scalar to decide  
Fhosc/2~Fhosc/256. TC0 length is 8-bit (256 steps), and the one count period is each cycle of input clock.  
TC0 Interval Time  
Fhosc=16MHz,  
Fcpu=Fhosc/4  
Fhosc=4MHz,  
Fcpu=Fhosc/4  
TC0CKS  
TC0rate[2:0] TC0 Clock  
max. (ms) Unit (us) max. (ms) Unit (us)  
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
000b  
001b  
010b  
011b  
100b  
101b  
110b  
111b  
000b  
001b  
010b  
011b  
100b  
101b  
110b  
111b  
Fcpu/256  
Fcpu/128  
Fcpu/64  
Fcpu/32  
Fcpu/16  
Fcpu/8  
16.384  
8.192  
4.096  
2.048  
1.024  
0.512  
0.256  
0.128  
4.096  
2.048  
1.024  
0.512  
0.256  
0.128  
0.064  
0.032  
64  
32  
16  
8
4
2
65.536  
32.768  
16.384  
8.192  
4.096  
2.048  
1.024  
0.512  
16.384  
8.192  
4.096  
2.048  
1.024  
0.512  
0.256  
0.128  
256  
128  
64  
32  
16  
8
4
2
64  
32  
16  
8
Fcpu/4  
Fcpu/2  
1
0.5  
16  
8
4
2
Fhosc/256  
Fhosc/128  
Fhosc/64  
Fhosc/32  
Fhosc/16  
Fhosc/8  
Fhosc/4  
Fhosc/2  
1
4
2
1
0.5  
0.5  
0.25  
0.125  
SONiX TECHNOLOGY CO., LTD  
Page 81  
Version 2.0  
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