SN8P2740 Series
ADC, OP-amp, Comparator 8-Bit Micro-Controller
ADC CONVERTING OPERATION:
; ADC Interrupt disable mode.
@@:
B0BTS1
JMP
FEOC
@B
; Check ADC processing flag.
; EOC=0: ADC is processing.
B0MOV
B0MOV
MOV
AND
B0MOV
…
A, ADB
BUF1,A
A, #00001111b
A, ADR
BUF2,A
; EOC=1: End of ADC processing. Process ADC result.
; End of processing ADC result.
CLR
FEOC
; Clear ADC processing flag for next ADC converting.
; ADC Interrupt enable mode.
ORG 8
; Interrupt vector.
INT_SR:
PUSH
B0BTS1
JMP
; Interrupt service routine.
FADCIRQ
EXIT_INT
A, ADB
BUF1,A
A, #00001111b
A, ADR
; Check ADC interrupt flag.
; ADCIRQ=0: Not ADC interrupt request.
; ADCIRQ=1: End of ADC processing. Process ADC result.
B0MOV
B0MOV
MOV
AND
B0MOV
…
BUF2,A
; End of processing ADC result.
CLR
FEOC
; Clear ADC processing flag for next ADC converting.
JMP
INT_EXIT
INT_EXIT:
POP
RETI
; Exit interrupt service routine.
Note: ADS is cleared when the end of ADC converting automatically. EOC bit indicates ADC processing
status immediately and is cleared when ADS = 1. Users needn’t to clear ADS bit by program.
SONiX TECHNOLOGY CO., LTD
Page 114
Version 2.0