Preliminary
SN8P1702A/SN8P1703A
8-bit micro-controller build-in 12-bit ADC
INT0 (P0.0) INTERRUPT OPERATION
The P0.0 interrupt trigger direction is control by PEDGE register.
PEDGE initial value = 0xx0 0xxx
0BFH
PEDGE
Bit 7
PEDGEN
R/W
Bit 6
-
-
Bit 5
-
-
Bit 4
P00G1
R/W
Bit 3
P00G0
R/W
Bit 2
-
-
Bit 1
-
-
Bit 0
-
-
Bit7
PEDGEN: Interrupt and wakeup trigger edge control bit.
0 = Disable edge trigger function.
Port 0: Low-level wakeup trigger and falling edge interrupt trigger.
Port 1: Low-level wakeup trigger.
1 = Enable edge trigger function.
P0.0: Wakeup and interrupt trigger is controlled by P00G1 and P00G0 bits.
Port 1: Level change (falling or rising edge) wakeup trigger.
Bit[4:3]
P00G[1:0]: Port 0.0 edge select bits.
00 = reserved,
01 = rising edge,
10 = falling edge,
11 = rising/falling bi-direction.
ꢁ
Example: INT0 interrupt request setup.
B0BSET
B0BCLR
B0BSET
FP00IEN
FP00IRQ
FGIE
; Enable INT0 interrupt service
; Clear INT0 interrupt request flag
; Enable GIE
ꢁ
Example: INT0 interrupt service routine.
ORG
JMP
8
; Interrupt vector
INT_SERVICE
INT_SERVICE:
B0XCH
B0MOV
B0MOV
A, ACCBUF
A, PFLAG
PFLAGBUF, A
; Store ACC value.
B0BTS1
JMP
FP00IRQ
EXIT_INT
; Check P00IRQ
; P00IRQ = 0, exit interrupt vector
B0BCLR
FP00IRQ
; Reset P00IRQ
.
.
.
.
; INT0 interrupt service routine
EXIT_INT:
B0MOV
B0MOV
B0XCH
A, PFLAGBUF
PFLAG, A
A, ACCBUF
; Restore ACC value.
; Exit interrupt vector
RETI
When the INT0 trigger occurs, the P00IRQ will be set to “1” no matter the P00IEN is enable or disable. If the P00IEN =
1 and the trigger event P00IRQ is also set to be “1”. As the result, the system will execute the interrupt vector (ORG
8). If the P00IEN = 0 and the trigger event P00IRQ is still set to be “1”. Moreover, the system won’t execute interrupt
vector even when the P00IRQ is set to be “1”. Users need to be cautious with the operation under multi-interrupt
situation.
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