SN8P1600
8-bit micro-controller
TC1C COUNTING REGISTER
TC1C is an 8-bit counter register for the timer (TC1). TC1C must be reset whenever the TC1ENB is set to “1” to start
the timer. TC1C is incremented each time a clock pulse of the frequency determined by TC1RATE0 ~ TC1RATE2.
When TC1C has incremented to “0FFH”, it counts to “00H” an overflow generated. Under TC1 interrupt service request
(TC1IEN) enable condition, the TC1 interrupt request flag will be set to “1” and the system executes the interrupt
service routine. When TC1C overflows, the TC1C will be restored automatically if ALOAD1 of TC1M register is
enabled.
0DDH
TC1C
Read/Write
After reset
Bit 7
TC1C7
R/W
-
Bit 6
TC1C6
R/W
-
Bit 5
TC1C5
R/W
-
Bit 4
TC1C4
R/W
-
Bit 3
TC1C3
R/W
-
Bit 2
TC1C2
R/W
-
Bit 1
TC1C1
R/W
-
Bit 0
TC1C0
R/W
-
The basic timer table interval time of TC1.
High speed mode (fcpu = 3.58MHz / 4)
Max overflow interval One step = max/256 Max overflow interval One step = max/256
Low speed mode (fcpu = 32768Hz / 4)
TC1CLOCK
TC1RATE
000
001
010
011
100
101
110
111
fcpu/256
fcpu/128
fcpu/64
fcpu/32
fcpu/16
fcpu/8
73.2 ms
36.6 ms
18.3 ms
9.15 ms
4.57 ms
2.28 ms
1.14 ms
0.57 ms
286us
143us
71.5us
35.8us
17.9us
8.94us
4.47us
2.23us
8000 ms
4000 ms
2000 ms
1000 ms
500 ms
250 ms
125 ms
62.5 ms
31.25 ms
15.63 ms
7.8 ms
3.9 ms
1.95 ms
0.98 ms
0.49 ms
0.24 ms
fcpu/4
fcpu/2
The equation of TC1C initial value is as following.
TC1C initial value = 256 - (TC1 interrupt interval time * input clock)
ꢃ
Example: To set 10ms interval time for TC1 interrupt at 3.58MHz high-speed mode. TC1C value (74H) =
256 - (10ms * fcpu/64)
TC1C initial value = 256 - (TC1 interrupt interval time * input clock)
= 256 - (10ms * 3.58 * 106 / 4 / 64)
= 256 - (10-2 * 3.58 * 106 / 4 / 64)
= 116
= 74H
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