SN8P1600
8-bit micro-controller
TC0/TC1 INTERRUPT OPERATION
When the TC0C/TC1C counter occurs overflow, the TC0IRQ/TC1IRQ will be set to “1” however the TC0IEN/TC1IEN is
enable or disable. If the TC0IEN = 1, the trigger event sets the TC0IRQ/TC1IRQ to be “1” and the system into interrupt
0vector. If the TC0IEN/TC1IEN = 0, the trigger event will make the TC0IRQ/TC1IEN to be “1” but the system not into
interrupt vector. Users need to care the operation under multi-interrupt situation.
ꢃ
Example: TC0 interrupt request setup.
B0BCLR
B0BCLR
MOV
B0MOV
MOV
FTC0IEN
FTC0ENB
A, #20H
TC0M, A
A, #74H
TC0C, A
; Disable TC0 interrupt service
; Disable TC0 timer
;
; Set TC0 clock = Fcpu / 64
; Set TC0C initial value = 74H
; Set TC0 interval = 10 ms
B0MOV
B0BSET
B0BCLR
B0BSET
FTC0IEN
FTC0IRQ
FTC0ENB
; Enable TC0 interrupt service
; Clear TC0 interrupt request flag
; Enable TC0 timer
B0BSET
FGIE
; Enable GIE
ꢃ
Example: TC0 interrupt service routine.
ORG
JMP
8
; Interrupt vector
INT_SERVICE
INT_SERVICE:
B0XCH
B0MOV
B0MOV
A, ACCBUF
A, PFLAG
PFLAGBUF, A
; Store ACC value.
B0BTS1
JMP
FTC0IRQ
EXIT_INT
; Check TC0IRQ
; TC0IRQ = 0, exit interrupt vector
B0BCLR
FTC0IRQ
; Reset TC0IRQ
MOV
A, #74H
B0MOV
TC0C, A
; Reset TC0C.
.
.
.
.
; TC0 interrupt service routine
EXIT_INT:
B0MOV
B0MOV
B0XCH
A, PFLAGBUF
PFLAG, A
A, ACCBUF
; Restore ACC value.
; Exit interrupt vector
RETI
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