SN8P1600
8-bit micro-controller
5SYSTEM REGISTER
OVERVIEW
The RAM area located in 80H~FFH bank 0 is system register area. The main purpose of system registers is to control
peripheral hardware of the chip. Using system registers can control I/O ports, timers and counters by programming.
The memory map provides an easy and quick reference source for writing application program. These system registers
accessing is controlled by the selected memory bank (RBANK = 0) or the bank 0 read/write instruction (B0MOV,
B0BSET, B0BCLR…).
SYSTEM REGISTER ARRANGEMENT (BANK 0)
BYTES of SYSTEM REGISTER
ꢂ
SN8P1602/1603
0
1
2
3
Z
-
4
Y
-
5
-
6
7
-
8
-
9
-
A
-
B
-
C
-
D
-
E
-
F
-
-
-
R
PFLAG
8
9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
A
B
C
D
E
F
-
P1W
P0
-
-
P1M
P1
-
-
P2M
P2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
INTRQ INTEN OSCM
-
-
-
PCL
PCH
STKP
-
-
-
-
-
@YZ
-
-
-
-
-
TC0M TC0C
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H
ꢂ
SN8P1604
0
1
2
R
3
Z
-
4
Y
-
5
-
6
7
-
8
-
9
-
A
-
B
-
C
-
D
-
E
-
F
-
-
-
PFLAG
8
9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
A
B
C
D
E
F
-
P1W
P0
-
-
P1M
P1
-
-
P2M
P2
-
-
-
-
P5M
P5
-
-
-
-
-
-
-
-
-
-
-
INTRQ INTEN OSCM
-
-
-
PCL
PCH
-
-
-
@YZ
-
-
-
-
-
-
-
-
TC1M TC1C TC1R STKP
-
-
-
-
-
-
-
-
-
-
-
-
-
STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H
Description
PFLAG = ROM page and special flag register.
P1W = Port 1 Wakeup register.
PnM = Port n input/output mode register.
INTRQ = Interrupt request register.
OSCM = Oscillator mode register.
TCnM = Timer n mode register.
R = Working register and ROM look-up data buffer.
Y, Z = Working, @YZ and ROM addressing register.
Pn = Port n data buffer.
INTEN = Interrupt enable register.
PCH, PCL = Program counter.
TCnC = Timer n counting register.
STKP = Stack pointer buffer.
TC1R= TC1 8-bit reload register.
@YZ = RAM YZ indirect addressing index pointer.
STK0~STK3 = Stack 0 ~ stack 3 buffer.
ꢂ
Note:
a). All register names had been declared in SN8ASM assembler.
b). 1-bit register name had been declared in SN8ASM assembler with “F” prefix code.
c). When using instruction to check empty location, logic “H” will be returned.
d). “b0bset”, “b0bclr”, ”bset”, ”bclr” instructions only support “R/W” registers.
SONiX TECHNOLOGY CO., LTD
Page 36
Revision 1.94