SN8P1602B
8-Bit Micro-Controller
PROGRAM FLAG
The PFLAG includes carry flag (C), decimal carry flag (DC) and zero flag (Z). If the result of operating is zero or there is
carry, borrow occurrence, then these flags will be set to PFLAG register.
086H
PFLAG
Read/Write
After reset
Bit 7
NT0
R/W
-
Bit 6
NPD
R/W
-
Bit 5
Bit 4
Bit 3
Bit 2
C
R/W
0
Bit 1
DC
R/W
0
Bit 0
Z
R/W
0
-
-
-
-
-
-
-
-
-
RESET/WAKEUP FLAG
NT0
0
NPD
0
Description
During the sleep mode, the device wakes up by the watch dog.
Such function only valid when users set “INT_16K_RC” code option as “Always_On”
Watchdog timer overflow in normal/slow/green mode.
During the sleep mode, the device wakes up by the reset pin.
External reset or LVD reset active
0
1
1
1
0
1
Note: Watchdog timer can also be used as a fixed-period timer if the watchdog reset function has been disabled.
CARRY FLAG
C = 1: When executed arithmetic addition with overflow or executed arithmetic subtraction without borrow or executed
rotation instruction with logic “1” shifting out.
C = 0: When executed arithmetic addition without overflow or executed arithmetic subtraction with borrow or executed
rotation instruction with logic “0” shifting out.
DECIMAL CARRY FLAG
DC = 1: If executed arithmetic addition with overflow of low nibble or executed arithmetic subtraction without borrow of
low nibble.
DC = 0: If executed arithmetic addition without overflow of low nibble or executed arithmetic subtraction with borrow of
low nibble.
ZERO FLAG
Z = 1: When the content of ACC or target memory is zero after executing instructions involving a zero flag.
Z = 0: When the content of ACC or target memory is not zero after executing instructions involving a zero flag.
SONiX TECHNOLOGY CO., LTD
Page 25
Version 1.1
SONIX [ SONIX TECHNOLOGY COMPANY ]
