SN8P1602B
8-Bit Micro-Controller
9INTERRUPT
OVERVIEW
The SN8P1602B provides 2 interrupt sources, including 1 internal interrupt (TC0) and 1 external interrupt (INT0). The
external interrupt can wakeup the chip while the system is switched from power down mode to high-speed normal
mode. Once interrupt service is executed, the GIE bit in STKP register will clear to “0” for stopping other interrupt
request. On the contrast, when interrupt service exits, the GIE bit will set to “1” to accept the next interrupts’ request. All
of the interrupt request signals are stored in INTRQ register.
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SN8P1602B
The interrupt trigger edge :
INTEN Interrupt enable register
INT0 = falling edge
TC0IRQ
TC0 time out
INT0 trigger
Interrupt vector address (0008H)
Global interrupt request signal
Interrupt
enable
gating
INTRQ
2-bit
Latchs
P00IRQ
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Note: The GIE bit must enable during all interrupt operation.
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