SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
6.6 INT0 (P0.0) & INT1 (P0.1) INTERRUPT OPERATION
When the INT0/INT1 trigger occurs, the P00IRQ/P01IRQ will be set to “1” no matter the P00IEN/P01IEN is enable or
disable. If the P00IEN/P01IEN = 1 and the trigger event P00IRQ/P01IRQ is also set to be “1”. As the result, the
system will execute the interrupt vector (ORG 8). If the P00IEN/P01IEN = 0 and the trigger event P00IRQ/P01IRQ is
still set to be “1”. Moreover, the system won’t execute interrupt vector even when the P00IRQ/P01IRQ is set to be “1”.
Users need to be cautious with the operation under multi-interrupt situation.
If the interrupt trigger direction is identical with wake-up trigger direction, the INT0/INT1 interrupt request flag
(INT0IRQ/INT1IRQ) is latched while system wake-up from power down mode or green mode by P0.0 wake-up trigger.
System inserts to interrupt vector (ORG 8) after wake-up immediately.
Note: INT0 interrupt request can be latched by P0.0 wake-up trigger.
Note: INT1 interrupt request can be latched by P0.1 wake-up trigger.
Note: The interrupt trigger direction of P0.0/P0.1 is control by PEDGE register.
0BFH
PEDGE
Read/Write
After reset
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
P01G1
R/W
1
Bit 2
P01G0
R/W
0
Bit 1
P00G1
R/W
1
Bit 0
P00G0
R/W
0
Bit[1:0]
Bit[3:2]
P00G[1:0]: P0.0 interrupt trigger edge control bits.
00 = reserved.
01 = rising edge.
10 = falling edge.
11 = rising/falling bi-direction (Level change trigger).
P01G[1:0]: P0.1 interrupt trigger edge control bits.
00 = reserved.
01 = rising edge.
10 = falling edge.
11 = rising/falling bi-direction (Level change trigger).
Example: Setup INT0 interrupt request and bi-direction edge trigger.
MOV
A, #18H
B0MOV
PEDGE, A
; Set INT0 interrupt trigger as bi-direction edge.
B0BSET
B0BCLR
B0BSET
FP00IEN
FP00IRQ
FGIE
; Enable INT0 interrupt service
; Clear INT0 interrupt request flag
; Enable GIE
SONiX TECHNOLOGY CO., LTD
Page 55
Version 1.2
SONIX [ SONIX TECHNOLOGY COMPANY ]
