SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
14 ELECTRICAL CHARACTERISTIC
14.1 ABSOLUTE MAXIMUM RATING
Supply voltage (Vdd)…………………………………………………………………………………………………………………….……………… - 0.3V ~ 6.0V
Input in voltage (Vin)…………………………………………………………………………………………………………………….… Vss – 0.2V ~ Vdd + 0.2V
Operating ambient temperature (Topr)
SN8F22711BS, SN8F2271BJ, SN8F22721BS, SN8F22721BX, SN8F22721BP …………………..……………. ………………… 0°C ~ + 70°C
Storage ambient temperature (Tstor) ………………………………………………………………….………………………………………… –30°C ~ + 125°C
14.2 ELECTRICAL CHARACTERISTIC
(All of voltages refer to Vss, Vdd = 5.0V, fosc = 6MHz, ambient temperature is 25°C unless otherwise note.)
PARAMETER
SYM.
DESCRIPTION
MIN.
TYP.
MAX.
UNIT
Normal mode except USB transmitter
specifications, Vpp = Vdd
Vdd1
4.0
5
5.5
V
Operating voltage
Vdd2 USB mode
Vdr
Vpor Vdd rise rate to ensure power-on reset
ViL1 P1, P5.3 input ports
4.25
-
0.05
Vss
5
1.5*
-
-
5.25
-
-
V
V
V/ms
V
RAM Data Retention voltage
Vdd rise rate
0.3Vdd
Input Low Voltage
Input High Voltage
0.2
VREG33
Vdd
ViL2 P0, P5.0, P5.1, P5.2 input ports
ViH1 P1, P5.3 input ports
Vss
-
-
-
-
-
V
V
V
V
V
0.7Vdd
0.8
VREG33
ViH2 P0, P5.0, P5.1, P5.2 input ports
Vin1 P1, P5.3 I/O port’s input voltage range
Vin2 P0, P5.0, P5.1, P5.2 I/O port’s input voltage range
VREG33
-0.5
Vdd+0.5
VREG33
+0.3
Input Voltage
-0.3
Voh1 P1, P5.3 output ports
Voh2 P0, P5.0, P5.1, P5.2 output ports
Ilekg Vin = Vdd
Rup1 P1, P5.3 ‘s Vin = Vss, Vdd = 5V
Rup2 P0, P5.0, P5.1, P5.2’s Vin = Vss, Vdd = 5V
0
0
-
25
40
1.35
-
-
-
-
Vdd
VREG33
2
V
V
Output Voltage
Reset pin leakage current
I/O port pull-up resistor Rup1
I/O port pull-up resistor Rup2
D- pull-up resistor
I/O port input leakage current
I/O output source current
P1, P5.3
sink current
P1, P5.3
I/O output source current
P0, P5.0~P5.2
uA
KΩ
KΩ
KΩ
uA
40*
60*
1.5
-
70
80
1.65
2
Rd-
Vdd = 5V, VREG = 3.3V
Ilekg Pull-up resistor disable, Vin = Vdd
IoH1 Vop = Vdd – 1V
15
20*
15*
2*
IoL1 Vop = Vss + 0.4V
IoH2 Vop1 = VREG33 – 1V
IoL2 Vop1 = Vss + 0.4V
20
mA
1
sink current
P0, P5.0~P5.2
2*
3
INTn trigger pulse width
Page erase (128 words)
Page program (32 words)
Tint0 INT0 interrupt request pulse width
Terase Flash ROM page erase time
2/fcpu
-
-
-
-
cycle
ms
ms
25*
1*
TBD
TBD
Tpg
Flash ROM page program time (program 32 words)
VREG33 Max Regulator Output Current,
Vcc > 4.35 volt with 10uF to GND
IVREG33
VREG33 Regulator current
VREG33 Regulator GND current
VREG25 Regulator GND current
-
-
-
70
120
-
60
100
150
3.6
mA
uA
uA
V
Ivreg33 No loading. VREG33 pin output 3.3V ((Regulator
_gnl enable)
Ivreg25 No loading.VREG25 pin output 2.5V ((Regulator
_gnl enable)
-
VCC > 4.35V, 0 < temp < 40°C,
IVREG ≦ 60 mA with 10uF to GND
Vreg1
3.0
VREG33 Regulator Output
voltage
VCC > 4.35V, 0 < temp < 40°C,
Vreg2
3.1
-
4
3.6
6
V
IVREG ≦ 25 mA with 10uF to GND
normal Mode
Idd1 (No loading,
Fcpu = Fosc/1)
Vdd= 5V, 6Mhz
-
-
mA
uA
Slow Mode
(Internal low RC)
Idd2
Vdd= 5V, 24Khz
190
250
Supply Current
LVD Voltage
Idd3 Sleep Mode
Vdd= 5V
-
-
190
1
250
2
uA
mA
Green Mode
Vdd= 5V,6Mhz
(No loading,
Idd4
Fcpu = Fosc/4
Vdd=5V, ILRC 24Khz
-
190
2.4
250
2.9
uA
V
Watchdog Disable)
Vdet Low voltage reset level.
2.0
* These parameters are for design reference, not tested.
SONiX TECHNOLOGY CO., LTD
Page 102
Version 1.2
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