SN8F2250B Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
8.3.3 T1C COUNTING REGISTER
T1C_L with T1C_H is an 16-bit counter register for T1 interval time control.
0DBH
T1C_L
Read/Write
After reset
Bit 7
T1C7
R/W
0
Bit 6
T1C6
R/W
0
Bit 5
T1C5
R/W
0
Bit 4
T1C4
R/W
0
Bit 3
T1C3
R/W
0
Bit 2
T1C2
R/W
0
Bit 1
T1C1
R/W
0
Bit 0
T1C0
R/W
0
0DCH
T1C_H
Read/Write
After reset
Bit 7
T1C15
R/W
0
Bit 6
T1C14
R/W
0
Bit 5
T1C13
R/W
0
Bit 4
T1C12
R/W
0
Bit 3
T1C11
R/W
0
Bit 2
T1C10
R/W
0
Bit 1
T1C9
R/W
0
Bit 0
T1C8
R/W
0
The equation of T1C initial value is as following.
T1C initial value = 65536 - (T1 interrupt interval time * input clock)
Example: To set 1ms interval time for T1 interrupt. High clock is 12MHz. Fcpu=Fosc/2. Select T1RATE=001
(Fcpu/128).
T1C initial value = 65536 - (T1 interrupt interval time * input clock)
= 65536 - (1s * 12MHz / 2 / 128)
= 65536 - (10 * 6 * 106 / 1 / 128)
= 18661
= 48E5H
The basic timer table interval time of T1.
High speed mode (Fcpu = 12MHz / 2)
T1RATE
T1CLOCK
Max overflow interval One step = max/256
000
001
010
011
100
101
110
111
Fcpu/256
Fcpu/128
Fcpu/64
Fcpu/32
Fcpu/16
Fcpu/8
2.796 s
1.398 s
42.67 us
21.33 us
10.67 us
5.33 us
2.67 us
1.33 us
0.67 us
0.33 us
699.051 ms
349.525 ms
174.763 ms
87.381 ms
43.691 ms
21.845 ms
Fcpu/4
Fcpu/2
SONiX TECHNOLOGY CO., LTD
Page 80
Version 1.1