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SN8F2250B 参数 Datasheet PDF下载

SN8F2250B图片预览
型号: SN8F2250B
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Micro-Controller]
分类和应用: 微控制器
文件页数/大小: 133 页 / 1554 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8F2250B Series  
USB 2.0 Full-Speed 8-Bit Micro-Controller  
3.2 POWER ON RESET  
The power on reset depend no LVD operation for most power-up situations. The power supplying to system is a rising  
curve and needs some time to achieve the normal voltage. Power on reset sequence is as following.  
z
z
Power-up: System detects the power voltage up and waits for power stable.  
External reset (only external reset pin enable): System checks external reset pin status. If external reset pin is  
not high level, the system keeps reset status and waits external reset pin released.  
System initialization: All system registers is set as initial conditions and system is ready.  
Oscillator warm up: Oscillator operation is successfully and supply to system clock.  
Program executing: Power on sequence is finished and program executes from ORG 0.  
z
z
z
3.3 WATCHDOG RESET  
Watchdog reset is a system protection. In normal condition, system works well and clears watchdog timer by program.  
Under error condition, system is in unknown situation and watchdog can’t be clear by program before watchdog timer  
overflow. Watchdog timer overflow occurs and the system is reset. After watchdog reset, the system restarts and  
returns normal mode. Watchdog reset sequence is as following.  
z
Watchdog timer status: System checks watchdog timer overflow status. If watchdog timer overflow occurs, the  
system is reset.  
z
z
z
System initialization: All system registers is set as initial conditions and system is ready.  
Oscillator warm up: Oscillator operation is successfully and supply to system clock.  
Program executing: Power on sequence is finished and program executes from ORG 0.  
Watchdog timer application note is as following.  
z
z
z
Before clearing watchdog timer, check I/O status and check RAM contents can improve system error.  
Don’t clear watchdog timer in interrupt vector and interrupt service routine. That can improve main routine fail.  
Clearing watchdog timer program is only at one part of the program. This way is the best structure to enhance the  
watchdog timer function.  
’
Note: Please refer to the “WATCHDOG TIMER” about watchdog timer detail information.  
SONiX TECHNOLOGY CO., LTD  
Page 39  
Version 1.1  
 
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