SN8F2250B Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
Table of Content
AMENDMENT HISTORY.............................................................................................................. 2
1
2
PRODUCT OVERVIEW ............................................................................................................ 7
1.1 FEATURES............................................................................................................................. 7
1.2 SYSTEM BLOCK DIAGRAM................................................................................................... 8
1.3 PIN ASSIGNMENT.................................................................................................................. 9
1.4 PIN DESCRIPTIONS............................................................................................................. 11
1.5 PIN CIRCUIT DIAGRAMS..................................................................................................... 12
CENTRAL PROCESSOR UNIT (CPU) ................................................................................... 13
2.1 MEMORY MAP ..................................................................................................................... 13
2.1.1 PROGRAM MEMORY (ROM)........................................................................................ 13
2.1.1.1 RESET VECTOR (0000H)....................................................................................... 14
2.1.1.2 INTERRUPT VECTOR (0008H)............................................................................... 15
2.1.1.3 LOOK-UP TABLE DESCRIPTION........................................................................... 17
2.1.1.4 JUMP TABLE DESCRIPTION ................................................................................. 19
2.1.1.5 CHECKSUM CALCULATION .................................................................................. 21
2.1.2 CODE OPTION TABLE.................................................................................................. 22
2.1.3 DATA MEMORY (RAM) ................................................................................................. 23
2.1.4 SYSTEM REGISTER ..................................................................................................... 24
2.1.4.1 SYSTEM REGISTER TABLE................................................................................... 24
2.1.4.2 SYSTEM REGISTER DESCRIPTION ..................................................................... 24
2.1.4.3 BIT DEFINITION of SYSTEM REGISTER............................................................... 25
2.1.4.4 ACCUMULATOR ..................................................................................................... 27
2.1.4.5 PROGRAM FLAG.................................................................................................... 28
2.1.4.6 PROGRAM COUNTER............................................................................................ 29
2.1.4.7 Y, Z REGISTERS..................................................................................................... 32
2.1.4.8 R REGISTERS......................................................................................................... 33
2.2 ADDRESSING MODE........................................................................................................... 34
2.2.1 IMMEDIATE ADDRESSING MODE ............................................................................... 34
2.2.2 DIRECTLY ADDRESSING MODE ................................................................................. 34
2.2.3 INDIRECTLY ADDRESSING MODE.............................................................................. 34
2.3 STACK OPERATION ............................................................................................................ 35
2.3.1 OVERVIEW.................................................................................................................... 35
2.3.2 STACK REGISTERS...................................................................................................... 36
2.3.3 STACK OPERATION EXAMPLE.................................................................................... 37
3
RESET .................................................................................................................................... 38
3.1 OVERVIEW........................................................................................................................... 38
3.2 POWER ON RESET.............................................................................................................. 39
3.3 WATCHDOG RESET ............................................................................................................ 39
3.4 BROWN OUT RESET ........................................................................................................... 40
3.4.1 BROWN OUT DESCRIPTION........................................................................................ 40
3.4.2 THE SYSTEM OPERATING VOLTAGE DECSRIPTION ............................................... 41
3.4.3 BROWN OUT RESET IMPROVEMENT......................................................................... 42
3.5 EXTERNAL RESET............................................................................................................... 43
3.6 EXTERNAL RESET CIRCUIT ............................................................................................... 43
3.6.1 Simply RC Reset Circuit................................................................................................. 43
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