SN8F2250B Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
14 ELECTRICAL CHARACTERISTIC
14.1 ABSOLUTE MAXIMUM RATING
Supply voltage (Vdd)…………………………………………………………………………………………………………………….……………… - 0.3V ~ 6.0V
Input in voltage (Vin)…………………………………………………………………………………………………………………….… Vss – 0.2V ~ Vdd + 0.2V
Operating ambient temperature (Topr)
SN8F2251BJ, SN8F22521B/2253BS, SN8F22521BX, SN8F2253BJ, SN8F2255BF ………………………...…. ………………… 0°C ~ + 70°C
Storage ambient temperature (Tstor) ………………………………………………………………….………………………………………… –30°C ~ + 125°C
14.2 ELECTRICAL CHARACTERISTIC
(All of voltages refer to Vss, Vdd = 5.0V, fosc = 12MHz, ambient temperature is 25°C unless otherwise note.)
PARAMETER
SYM.
DESCRIPTION
MIN.
TYP.
MAX.
UNIT
Normal mode except USB transmitter
specifications, Vpp = Vdd
Vdd1
4.0
5
5.5
V
Operating voltage
Vdd2 USB mode
Vdr
Vpor Vdd rise rate to ensure power-on reset
ViL1 P0, P1, P5.3, P5.4 input ports
4.25
-
0.05
Vss
5
1.5*
-
-
5.25
-
-
V
V
V/ms
V
RAM Data Retention voltage
Vdd rise rate
0.3Vdd
Input Low Voltage
Input High Voltage
0.2
VREG33
Vdd
ViL2 P2, P5.0, P5.1, P5.2 input ports
ViH1 P0, P1, P5.3, P5.4 input ports
ViH2 P2, P5.0, P5.1, P5.2 input ports
Vss
-
-
-
V
V
V
0.7Vdd
0.8
VREG33
Vdd
Reset pin leakage current
I/O port pull-up resistor Rup1
I/O port pull-up resistor Rup2
D+ pull-up resistor
I/O port input leakage current
I/O output source current
sink current
Ilekg Vin = Vdd
-
25
50
1.35
-
-
2
70
150
1.65
2
uA
KΩ
KΩ
KΩ
uA
Rup1 P0, P1, P5.3, P5.4 ‘s Vin = Vss, Vdd = 5V
Rup2 P2, P5.0, P5.1, P5.2’s Vin = Vss, Vdd = 5V
Rd+ Vdd = 5V, VREG = 3.3V
40*
100*
1.5
-
20*
15*
Ilekg Pull-up resistor disable, Vin = Vdd
IoH
IoL
Vop = Vdd – 1V
Vop = Vss + 0.4V
15
mA
20
-
INTn trigger pulse width
Page erase (128 words)
Page program (32 words)
Tint0 INT0 interrupt request pulse width
Terase Flash ROM page erase time
2/fcpu
-
cycle
ms
-
-
25*
1*
TBD
TBD
Tpg
Flash ROM page program time (program 32 words)
ms
VREG33 Max Regulator Output Current,
Vcc > 4.35 volt with 10uF to GND
Ivreg33 No loading. VREG33 pin output 3.3V ((Regulator
_gnl enable)
Ivreg25 No loading.VREG25 pin output 2.5V ((Regulator
_gnl enable)
IVREG33
VREG33 Regulator current
VREG33 Regulator GND current
VREG25 Regulator GND current
-
-
-
-
60
mA
uA
uA
70
100
150
120
VCC > 4.35V, 0 < temp < 40°C,
Vreg1
3.0
3.1
-
-
3.6
3.6
V
V
IVREG ≦ 60 mA with 10uF to GND
VREG33 Regulator Output
voltage
VCC > 4.35V, 0 < temp < 40°C,
Vreg2
IVREG ≦ 25 mA with 10uF to GND
normal Mode
Idd1 (No loading,
Fcpu = Fosc/1)
Vdd= 5V, 12Mhz
-
10
15
mA
Slow Mode
Idd2
Vdd= 5V, 24Khz
Vdd= 5V
-
-
190
190
250
250
uA
uA
(Internal low RC)
Supply Current
LVD Voltage
Idd3 Sleep Mode
Green Mode
(No loading,
Fcpu = Fosc/4
Watchdog Disable)
Vdd= 5V, 12Mhz
-
5
10
mA
Idd4
Vdd=5V, ILRC 24Khz
-
190
2.4
250
2.9
uA
V
Vdet Low voltage reset level.
2.0
* These parameters are for design reference, not tested.
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