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SN8F2280 参数 Datasheet PDF下载

SN8F2280图片预览
型号: SN8F2280
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Micro-Controller]
分类和应用: 微控制器
文件页数/大小: 163 页 / 3660 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8F2280 Series  
USB 2.0 Full-Speed 8-Bit Micro-Controller  
0 = Disable CKP function.  
1 = Enable CKP function.  
In MSP Master and Slave Transistor mode:  
Unused.  
Bit 2  
MSPWK: MSP Wake-up indication bit.  
0 = MCU NOT wake-up by MSP.  
1 = MCU wake-up by MSP.  
’
Note: Clear MSPWK before entering Power down mode for indication the wake-up source from MSP or  
not.  
Bit 0  
MSPC: MSP mode Control register.  
0 = MSP operated on Slave mode, 7-bit address.  
1 = MSP operated on Master mode.  
13.4 MSP MODE REGISTER 2  
MSPM2 initial value =00000000  
0ECH  
MSPM2  
Read/Write  
After Reset  
Bit 7  
GCEN  
R/W  
0
Bit 6  
ACKSTAT  
R/W  
Bit 5  
ACKDT  
R/W  
Bit 4  
ACKEN  
R/W  
Bit 3  
RCEN  
R/W  
0
Bit 2  
PEN  
R/W  
0
Bit 1  
RSEN  
R/W  
0
Bit 0  
SEN  
R/W  
0
0
0
0
Bit 7  
GCEN: General Call Enable bit. (In Slave mode only)  
0 = General call address disabled.  
1 = Enable interrupt when a general call address (0000h) is received.  
Bit 6  
ACKSTAT: Acknowledge Status bit. (In master mode only)  
In master transmit mode:  
0 = Acknowledge was received from slave.  
1 = Acknowledge was not received from slave.  
Bit 5  
ACKDT: Acknowledge Data bit. (In master mode only)  
In master receive mode:  
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.  
0 = Acknowledge.  
1 = Not Acknowledge.  
Bit 4  
ACKEN: Acknowledge Sequence Enable bit. (In MSP master mode only)  
In master receive mode:  
0 = Acknowledge sequence idle.  
1 = Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit. Automatically  
cleared by hardware.  
’
Note: If the MSP module is not in the idle mode, this bit may not be set (no spooling), and the MSPBUF  
may not be written (or writes to the MSPBUF are disabled).  
Bit 3  
RCEN: Receive Enable bit. (In master mode only)  
0 = Receive idle.  
1 = Enables Receive mode for MSP.  
’
Note: If the MSP module is not in the idle mode, this bit may not be set (no spooling), and the MSPBUF  
may not be written (or writes to the MSPBUF are disabled).  
Bit 2  
PEN: Stop Condition Enable bit. (In master mode only)  
SONiX TECHNOLOGY CO., LTD  
Page 136  
Version 1.1  
 
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