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SN8F2288 参数 Datasheet PDF下载

SN8F2288图片预览
型号: SN8F2288
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Micro-Controller]
分类和应用: 微控制器
文件页数/大小: 163 页 / 3660 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
 浏览型号SN8F2288的Datasheet PDF文件第93页浏览型号SN8F2288的Datasheet PDF文件第94页浏览型号SN8F2288的Datasheet PDF文件第95页浏览型号SN8F2288的Datasheet PDF文件第96页浏览型号SN8F2288的Datasheet PDF文件第98页浏览型号SN8F2288的Datasheet PDF文件第99页浏览型号SN8F2288的Datasheet PDF文件第100页浏览型号SN8F2288的Datasheet PDF文件第101页  
SN8F2280 Series  
USB 2.0 Full-Speed 8-Bit Micro-Controller  
8.4.4 TCnR AUTO-LOAD REGISTER  
TCn (n = 0, 1, 2) timer is with auto-load function controlled by ALOADn (n = 0, 1, 2) bit of TCnM (n = 0, 1, 2). When  
TCnC (n = 0, 1, 2) overflow occurring, TCnR (n = 0, 1, 2) value will load to TCnC by system. It is easy to generate an  
accurate time, and users don’t reset TCnC during interrupt service routine.  
TCn is double buffer design. If new TCnR value is set by program, the new value is stored in 1st buffer. Until TCn  
overflow occurs, the new value moves to real TCnR buffer. This way can avoid TCn interval time error and glitch in  
PWM and Buzzer output.  
’
Note: Under PWM mode, auto-load is enabled automatically. The ALOADn bit is selecting overflow  
boundary.  
08AH  
TC0R  
Read/Write  
After reset  
Bit 7  
TC0R7  
W
Bit 6  
TC0R6  
W
Bit 5  
TC0R5  
W
Bit 4  
TC0R4  
W
Bit 3  
TC0R3  
W
Bit 2  
TC0R2  
W
Bit 1  
TC0R1  
W
Bit 0  
TC0R0  
W
0
0
0
0
0
0
0
0
08DH  
TC1R  
Read/Write  
After reset  
Bit 7  
TC1R7  
W
Bit 6  
TC1R6  
W
Bit 5  
TC1R5  
W
Bit 4  
TC1R4  
W
Bit 3  
TC1R3  
W
Bit 2  
TC1R2  
W
Bit 1  
TC1R1  
W
Bit 0  
TC1R0  
W
0
0
0
0
0
0
0
0
090H  
TC2R  
Read/Write  
After reset  
Bit 7  
TC2R7  
W
Bit 6  
TC2R6  
W
Bit 5  
TC2R5  
W
Bit 4  
TC2R4  
W
Bit 3  
TC2R3  
W
Bit 2  
TC2R2  
W
Bit 1  
TC2R1  
W
Bit 0  
TC2R0  
W
0
0
0
0
0
0
0
0
The equation of TCnR initial value is as following.  
TCnR initial value = N - (TCn interrupt interval time * input clock)  
N is TCn overflow boundary number. TCn timer overflow time has six types (TCn timer, TCn event counter, TCn Fcpu  
clock source, TCn Fosc clock source, PWM mode and no PWM mode). These parameters decide TCn overflow time  
and valid value as follow table.  
TCnR valid  
value  
TCnR value  
binary type  
TCnCKS PWMn ALOADn TCnOUT  
N
0
1
1
1
1
-
x
0
0
1
1
-
x
0
1
0
1
-
256  
256  
64  
32  
16  
0x00~0xFF 00000000b~11111111b  
0x00~0xFF 00000000b~11111111b  
0
1
0x00~0x3F  
0x00~0x1F  
0x00~0x0F  
xx000000b~xx111111b  
xxx00000b~xxx11111b  
xxxx0000b~xxxx1111b  
256  
0x00~0xFF 00000000b~11111111b  
¾
Example: To set 1ms interval time for TCn interrupt. TCn clock source is Fcpu (TCnKS=0) and no PWM  
output (PWMn=0). High clock is internal 6MHz. Fcpu=Fosc/2. Select TCnRATE=010 (Fcpu/64).  
TCnR initial value = N - (TCn interrupt interval time * input clock)  
= 256 - (1ms * 6MHz / 1 / 64)  
= 256 - (10-3 * 6 * 106 / 1 / 64)  
= 162  
= A2H  
SONiX TECHNOLOGY CO., LTD  
Page 97  
Version 1.1  
 
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