SN8F2280 Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
Bit 4
ADLEN: ADC’s resolution select bits.
0 = 8-bit.
1 = 12-bit.
Bit [3:0] ADB [3:0]: 12-bit low-nibble ADC data buffer.
12.4 ADB REGISTERS
0B7H
ADB
Bit 7
ADB11
Bit 6
ADB10
Bit 5
ADB9
Bit 4
ADB8
Bit 3
ADB7
Bit 2
ADB6
Bit 1
ADB5
Bit 0
ADB4
Read/Write
After reset
R
-
R
-
R
-
R
-
R
-
R
-
R
-
R
-
Bit[7:0]
ADB[7:0]: 8-bit ADC data buffer and the high-byte data buffer of 12-bit ADC.
ADB is ADC data buffer to store ADC converter result. The ADB register is only 8-bit register including bit 4~bit11 ADC
data. To combine ADB register and the low-nibble of ADR will get full 12-bit ADC data buffer. The ADC buffer is a
read-only register and the initial status is unknown after system reset.
¾
¾
ADB[11:4]: In 8-bit ADC mode, the ADC data is stored in ADB register.
ADB[11:0]: In 12-bit ADC mode, the ADC data is stored in ADB and ADR registers.
Note: The initial status of ADC data buffer including ADB register and ADR low-nibble after the system
reset is unknown.
The AIN’s input voltage v.s. ADB’s output data
AIN n
ADB11 ADB10 ADB9 ADB8 ADB7 ADB6 ADB5 ADB4 ADB3 ADB2 ADB1 ADB0
0/4096*VREFH
1/4096*VREFH
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
1
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
4094/4096*VREFH
4095/4096*VREFH
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
For different applications, users maybe need more than 8-bit resolution but less than 12-bit. To process the ADB and
ADR data can make the job well. First, the AD resolution must be set 12-bit mode and then to execute ADC converter
routine. Then delete the LSB of ADC data and get the new resolution result. The table is as following.
ADC
Resolution
8-bit
ADB
ADB8
ADR
ADB11
ADB10 ADB9
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
x
x
x
O
O
O
x
x
x
O
O
x
x
x
x
O
9-bit
10-bit
11-bit
12-bit
O
O
O
O
O = Selected, x = Delete
SONiX TECHNOLOGY CO., LTD
Page 130
Version 1.1
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