SN8P1700
8-bit micro-controller build-in 12-bit ADC
CHIP DECLARATION IN ASSEMBLER
Assembler
OTP Device Part Number
SN8P1702
MASK Device Part Number
SN8A1702A
CHIP SN8P1702
CHIP SN8P1704
CHIP SN8P1706
CHIP SN8P1707
CHIP SN8P1708
SN8P1704
SN8A1704A
SN8P1706
SN8A1706A
SN8P1707
SN8A1707A
SN8P1708
SN8A1708A
PROGRAM CHECK LIST
Item
Description
Use @SET_PUR macro to enable or disable on-chip pull-up resisters. Refer I/O port chapter
for detailed information.
Pull-up Resister
Undefined Bits
All bits those are marked as “0” (undefined bits) in system registers should be set “0” to
avoid unpredicted system errors.
ADC
SIO Master Mode
SIO Slave Mode
PWM0
Set ADC input pin I/O direction as input mode and disable pull-up resister of ADC input pin
Set SCK (P5.0) and SO (P5.2) pin as output mode. Set SI (P5.1) pin as input mode.
Set SO (P5.2) pin as output mode. Set SCK (P5.0) and SI (P5.1) pin as input mode.
Set PWM0 (P5.4) pin as output mode.
PWM1
Set PWM1 (P5.3) pin as output mode.
Interrupt
Do not enable interrupt before initializing RAM.
Non-used I/O ports should be pull-up or pull-down in input mode, or be set as low in output
mode to save current consumption.
Non-Used I/O
Sleep Mode
Stack Buffer
Enable on-chip pull-up resisters of port 0 and port 1 to avoid unpredicted wakeup.
Be careful of function call and interrupt service routine operation. Don’t let stack buffer
overflow or underflow.
1. Write 0x7F into STKP register to initial stack pointer and disable global interrupt
2. Clear all RAM.
System Initial
3. Initialize all system register even unused registers.
1. Enable OSG and High_Clk / 2 code option together
2. Enable the watchdog option to protect system crash.
3. Non-used I/O ports should be set as output low mode
4. Constantly refresh important system registers and variables in RAM to avoid system
crash by a high electrical fast transient noise.
Noisy Immunity
5. Enable the LVD option to improve the power on reset or brown-out reset performance
SONiX TECHNOLOGY CO., LTD
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Revision 1.94
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