Preliminary
SN8P1702A/SN8P1703A
8-bit micro-controller build-in 12-bit ADC
SYSTEM MODE CONTROL
SYSTEM MODE BLOCK DIAGRAM
Power Down Mode
(Sleep Mode)
P0, P1 wake-up function active.
External reset circuit active.
CPUM1, CPUM0 = 01
CLKMD = 1
CLKMD = 0
Normal Mode
Slow Mode
P0, P1 wake-up function active.
TC0 time out.
CPUM1, CPUM0 = 10
P0, P1 wake-up function active.
TC0 time out.
External reset circuit active.
Green Mode
External reset circuit active.
Figure 7-6. System Mode Block Diagram
Operating mode description
POWER DOWN
MODE
NORMAL
SLOW
GREEN
REMARK
(SLEEP)
HX osc.
LX osc.
CPU instruction
Running
Running
Executing
By STPHX
Running
Executing
By STPHX
Running
Stop
Stop
Stop
Stop
* Active by
program
TC0 timer
*Active
Active
*Active
Active
*Active
Inactive
Watchdog timer
Internal
By INT_16K_RC By INT_16K_RC
All active
All active
TC0
All inactive
All inactive
interrupt
External
interrupt
All active
-
All active
-
All active
P0, P1, TC0
Reset
Wakeup source
P0, P1, Reset
Table 7-1. Operating Mode Description
SONiX TECHNOLOGY CO., LTD
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Revision 0.5
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