SN8P1700
8-bit micro-controller build-in 12-bit ADC
SYSTEM MODE CONTROL
SN8P1700 SYSTEM MODE BLOCK DIAGRAM
Power Down Mode
(Sleep Mode)
P0, P1 wake-up function active.
External reset circuit active.
CPUM0 = 01
CLKMD = 1
Normal Mode
Slow Mode
CLKMD = 0
Figure 7-6. SN8P1700 System Mode Block Diagram
Operating mode description
POWER DOWN
MODE
NORMAL
SLOW
REMARK
(SLEEP)
HX osc.
LX osc.
CPU instruction
T0 timer
TC0 timer
TC1 timer
Watchdog timer
Internal interrupt
External interrupt
Wakeup source
Running
Running
Executing
*Active
*Active
*Active
Active
All active
All active
-
By STPHX
Running
Executing
*Active
*Active
*Active
Active
All active
All active
Stop
Stop
Stop
Inactive
Inactive
Inactive
Inactive
All inactive
All inactive
* Active by
programm.
-
P0, P1, Reset
Table 7-1. Operating Mode Description
SONiX TECHNOLOGY CO., LTD
Page 65
Revision 1.94
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