USB 2.0 HSIC Hi-Speed 4-Port Hub Controller
Datasheet
9.5.7
SPI Timing
The following specifies the SPI timing requirements for the device.
tceh
SPI_CE_N
tfc
tcel
SPI_CLK
SPI_DI
tclq
tdh
tos toh
tov
toh
SPI_DO
Figure 9.3 SPI Timing
Note: The SPI can be configured for 30 MHz or 60 MHz operation via the SPI_SPD_SEL
configuration strap. 30 MHz operation timing values are shown in Table 9.10. 60 MHz operation
timing values are shown in Table 9.11.
Table 9.10 SPI Timing Values (30 MHz Operation)
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
tfc
tceh
tclq
tdh
Clock frequency
30
MHz
ns
Chip enable (SPI_CE_EN) high time
Clock to input data
100
13
ns
Input data hold time
0
5
ns
tos
Output setup time
ns
toh
tov
tcel
tceh
Output hold time
5
ns
Clock to output valid
4
ns
Chip enable (SPI_CE_EN) low to first clock
Last clock to chip enable (SPI_CE_EN) high
12
12
ns
ns
Revision 1.0 (06-17-13)
66
SMSC USB4604
DATASHEET
SMSC [ SMSC CORPORATION ]
