Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
7.1.1.12
Debug
Address = 15h (read only)
FIELD NAME
BIT
ACCESS
DEFAULT DESCRIPTION
Linestate0
Linestate1
Reserved
0
1
rd
rd
rd
0b
0b
Contains the current value of Linestate[0].
Contains the current value of Linestate[1].
Read only, 0.
7:2
000000b
7.1.1.13
Scratch Register
Address = 16-18h (read), 16h (write), 17h (set), 18h (clear)
FIELD NAME
BIT
ACCESS
DEFAULT DESCRIPTION
00h Empty register byte for testing purposes. Software
Scratch
7:0
rd/w/s/c
can read, write, set, and clear this register and the
transceiver functionality will not be affected.
7.1.2
Carkit Control Registers
The following registers are used to set-up and enable the USB UART and USB Audio functions.
7.1.2.1
Carkit Control
Address = 19-1Bh (read), 19h (write), 1Ah (set), 1Bh (clear)
This register is used to program the USB3320 into and out of the Carkit Mode. When entering the
UART mode the Link must first set the desired TxdEn and the RxdEn bits and then transition to Carkit
Mode by setting the CarkitMode bit in the Interface Control Register. When RxdEn is not set then the
DATA[1] pin is held to a logic high.
FIELD NAME
BIT
ACCESS
DEFAULT DESCRIPTION
CarkitPwr
IdGndDrv
TxdEn
0
1
2
3
4
5
6
7
rd
0b
0b
0b
0b
0b
0b
0b
0b
Read only, 0.
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd/w/s/c
rd
Drives ID pin to ground
Connects UART TXD (DATA[0]) to DM
Connects UART RXD (DATA[1]) to DP
Connects DM pin to SPK_L pin
Connects DP pin to SPK_R pin. See Note below.
Connects DP pin to SPK_R pin. See Note below.
Read only, 0.
RxdEn
SpkLeftEn
SpkRightEn
MicEn
Reserved
Note: If SpkRightEn or MicEn are asserted the DP pin will be connected to SPK_R. To disconnect
the DP pin from the SPK_R pin both SpkrRightEn and MicEn must be set to de-asserted.
SMSC USB3320
Revision 1.0 (07-14-09)
DATA6S7HEET
SMSC [ SMSC CORPORATION ]
