3
PINOUT
PIN #
NAME
PIN #
33
NAME
SER_IRQ
PIN #
65
NAME
GP35/IRQINB
GP36/nKBDRST
GP37/A20M
VCC
PIN #
97
NAME
GP51/nDCD2
GP52/RXD2/IRRX
GP53/TXD2/IRTX
GP54/nDSR2
GP55/nRTS2
/SADR0
1
2
3
4
5
VTR
Vbat
34
VSS
66
98
XTAL1
XTAL2/CLKI32
AVSS
35
GP80
GP81
GP82
67
99
36
68
100
101
37
69
nINIT
6
7
GP40/DRVDEN0
GP41/DRVDEN1
38
39
GP83
GP84
70
71
nSLCTIN
PD0
102
103
GP56/nCTS2
GP57/nDTR2
/SADR1
8
MTR0#
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
GP85
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
PD1
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
SCLK
9
DSKCHG#
DS0#
GP86
PD2
SDAT
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GP87
PD3
VSS
DIR#
GP62/IRQINC
GP20/P17/DS1#
GP21/P16
GP22/P12/MTR1#
GP23/IRQIND
GP24/P17
GP25/P12
GP26/SYSOPT
GP60/LED1
GP61/LED2
GP27/IO_SMI#
GP30/nXCS2
GP31/nXCS3
VTR
PD4
nXWR/GP70
nXRD/GP71
XA0/GP72
XA1/GP73
XA2/GP74
XA3/GP75
nXCS0/GP76
XCS1/GP77
LCDCS
STEP#
PD5
WDATA#
WGATE#
HDSEL#
INDEX#
TRK0#
PD6
PD7
VSS
SLCT
PE
WRTPRT#
RDATA#
GP42/IO_PME#
VCC
BUSY
nACK
nERROR
nALF
XD0/GP10
XD1/GP11
XD2/GP12
XD3/GP13
XD4/GP14
XD5/GP15
XD6/GP16
XD7/GP17
XOSEL
CLOCKI
LAD0
nSTROBE
RXD1
TXD1
nDSR1
nRTS1
nCTS1
nDTR1
nRI1
LAD1
LAD2
GP32/FAN_TACH
GP33/FAN
KDAT
LAD3
LFRAME#
LDRQ#
KCLK
PCI_RESET#
LPCPD#
GP43/DDRC
PCI_CLK
MDAT
VTR
MCLK
nDCD1
GP50/nRI2
VCC
CLKO40
VSS
nPB_IN
GP34/IRQINA
nPS_ON
Note: Pin 4, XTAL2/CLKI32, must not be grounded if XOSEL is floating.
SMSC DS – LPC47S45x
Page 11 of 259
Rev. 07/09/2001
DATASHEET