USB 2.0 Hub and 10/100 Ethernet Controller
Datasheet
Table 2.1 EEPROM Pins
NUM
PINS
BUFFER
TYPE
NAME
SYMBOL
DESCRIPTION
EEPROM Data
In
EEDI
IS
(PD)
This pin is driven by the EEDO output of the
external EEPROM.
1
1
1
1
EEPROM Data
Out
EEDO
EECS
O8
O8
O8
This pin drives the EEDI input of the external
EEPROM.
EEPROM Chip
Select
This pin drives the chip select output of the external
EEPROM.
EEPROM Clock
EECLK
This pin drives the EEPROM clock of the external
EEPROM.
Table 2.2 JTAG Pins
NUM
PINS
BUFFER
TYPE
NAME
SYMBOL
DESCRIPTION
JTAG Test Port
Reset
nTRST
IS
This active low pin functions as the JTAG test port
reset input.
1
Note:
This pin should be tied high if it is not
used.
JTAG Test
Mode Select
TMS
TDI
IS
IS
This pin functions as the JTAG test mode select.
This pin functions as the JTAG data input.
This pin functions as the JTAG data output.
This pin functions as the JTAG test clock.
1
1
1
1
JTAG Test Data
Input
JTAG Test Data
Out
TDO
TCK
O12
IS
JTAG Test
Clock
Table 2.3 Miscellaneous Pins
BUFFER
NUM
PINS
NAME
SYMBOL
TYPE
DESCRIPTION
System Reset
nRESET
IS
This active low pin allows external hardware to
reset the device.
1
1
Note:
This pin should be tied high if it is not
used.
Ethernet
Full-Duplex
Indicator LED
nFDX_LED
GPIO0
OD12
(PU)
This pin is driven low (LED on) when the Ethernet
link is operating in full-duplex mode.
General
Purpose I/O 0
IS/O12/
OD12
(PU)
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
Revision 1.0 (11-24-09)
SMSC LAN9514/LAN9514i
DATA1S0HEET
SMSC [ SMSC CORPORATION ]
