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LAN9218 参数 Datasheet PDF下载

LAN9218图片预览
型号: LAN9218
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能单芯片10/100以太网控制器,带有HP Auto-MDIX的 [High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 130 页 / 1558 K
品牌: SMSC [ SMSC CORPORATION ]
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High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX  
Datasheet  
When performing a fast-forward, there must be at least 4 DWORDs of data in the RX data FIFO for  
the packet being discarded. For less than 4 DWORDs do not use RX_FFWD. In this case data must  
be read from the RX data FIFO and discarded using standard PIO read operations.  
After initiating a fast-forward operation, do not perform any reads of the RX data FIFO until the  
RX_FFWD bit is cleared. Other resources can be accessed during this time (i.e., any registers and/or  
the other three FIFOs). Also note that the RX_FFWD will only fast-forward the RX data FIFO, not the  
RX status FIFO. After an RX fast-forward operation the RX status must still be read from the RX status  
FIFO.  
The receiver does not have to be stopped to perform a fast-forward operation.  
3.14.1.2  
Force Receiver Discard (Receiver Dump)  
In addition to the Receive data Fast Forward feature, LAN9218 also implements a receiver "dump"  
feature. This feature allows the host processor to flush the entire contents of the RX data and RX  
status FIFOs. When activated, the read and write pointers for the RX data and status FIFOs will be  
returned to their reset state. To perform a receiver dump, the LAN9218 receiver must be halted. Once  
the receiver stop completion is confirmed, the RX_DUMP bit can be set in the RX_CFG register. The  
RX_DUMP bit is cleared when the dump is complete. For more information on stopping the receiver,  
please refer to Section 3.14.4, "Stopping and Starting the Receiver," on page 55. For more information  
on the RX_DUMP bit, please refer to Section 5.3.7, "RX_CFG—Receive Configuration Register," on  
page 74.  
3.14.2  
RX Packet Format  
The RX status words can be read from the RX status FIFO port, while the RX data packets can be  
read from the RX data FIFO. RX data packets are formatted in a specific manner before the host can  
read them. It is assumed that the host has previously read the associated status word from the RX  
status FIFO, to ascertain the data size and any error conditions.  
SMSC LAN9218  
Revision 1.5 (07-18-06)  
DATA5S3HEET