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LAN9218 参数 Datasheet PDF下载

LAN9218图片预览
型号: LAN9218
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能单芯片10/100以太网控制器,带有HP Auto-MDIX的 [High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 130 页 / 1558 K
品牌: SMSC [ SMSC CORPORATION ]
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High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX  
Datasheet  
Table 2.4 Serial EEPROM Interface Signals  
PIN  
NO.  
BUFFER  
TYPE  
NUM  
PINS  
NAME  
SYMBOL  
DESCRIPTION  
69  
EEPROM Clock,  
GPO4 RX_DV,  
RX_CLK  
EECLK/GPO4/  
RX_DV/RX_CLK  
O8  
1
EEPROM Clock: Serial EEPROM  
Clock pin.  
General Purpose Output 4: This  
pin can also function as a general-  
purpose output, or it can be  
configured to monitor the RX_DV or  
RX_CLK signals on the internal MII  
port. When configured as a GPO  
signal, or as an RX_DV/RX_CLK  
monitor, the EECS pin is deasserted  
so as to never unintentionally access  
the serial EEPROM. This signal  
cannot function as a general-  
purpose input.  
Table 2.5 System and Power Signals (continued)  
PIN  
NO.  
BUFFER  
TYPE  
NUM  
PINS  
NAME  
SYMBOL  
DESCRIPTION  
6
Crystal 1  
XTAL1  
lclk  
1
External 25MHz Crystal Input.  
Can also be connected to single-  
ended TTL oscillator. If this method is  
implemented, XTAL2 should be left  
unconnected.  
5
Crystal 2  
Reset  
XTAL2  
Oclk  
1
1
External 25MHz Crystal output.  
95  
nRESET  
IS  
(PU)  
Active-low reset input. Resets all  
logic and registers within the  
LAN9218. This signal is pulled  
high with a weak internal pull-up  
resistor. If nRESET is left  
unconnected, the LAN9218 will  
rely on its internal power-on reset  
circuitry  
Note:  
The LAN9218 must always  
be read at least once after  
power-up, reset, or upon  
return from a power-saving  
state or write operations will  
not function. See Section  
3.12, "Detailed Reset  
Description," on page 39 for  
additional information  
SMSC LAN9218  
Revision 1.5 (07-18-06)  
DATA1S7HEET  
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