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LAN9218I-MT 参数 Datasheet PDF下载

LAN9218I-MT图片预览
型号: LAN9218I-MT
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能单芯片10/100以太网控制器,带有HP Auto-MDIX的和工业级温度支持 [High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX & Industrial Temperature Support]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输局域网以太网局域网(LAN)标准时钟
文件页数/大小: 130 页 / 1564 K
品牌: SMSC [ SMSC CORPORATION ]
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High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX & Industrial Temperature Support  
Datasheet  
Table 3.3 Filter i Byte Mask Bit Definitions  
FILTER I BYTE MASK DESCRIPTION  
FIELD  
DESCRIPTION  
31  
Must be zero (0)  
30:0  
Byte Mask: If bit j of the byte mask is set, the CRC machine processes byte number pattern - (offset  
+ j) of the incoming frame. Otherwise, byte pattern - (offset + j) is ignored.  
The Filter i command register controls Filter i operation. Table 3.4 shows the Filter I command register.  
Table 3.4 Filter i Command Bit Definitions  
FILTER i COMMANDS  
FIELD  
DESCRIPTION  
3
Address Type: Defines the destination address type of the pattern. When bit is set, the pattern  
applies  
only to multicast frames. When bit is cleared, the pattern applies only to unicast frames.  
2:1  
0
RESERVED  
Enable Filter: When bit is set, Filter i is enabled, otherwise, Filter i is disabled.  
The Filter i Offset register defines the offset in the frame’s destination address field from which the  
frames are examined by Filter i. Table 3.5 describes the Filter i Offset bit fields.  
Table 3.5 Filter i Offset Bit Definitions  
FILTER I OFFSET DESCRIPTION  
DESCRIPTION  
FIELD  
7:0  
Pattern Offset: The offset of the first byte in the frame on which CRC is checked for wake-up frame  
recognition. The minimum value of this field must be 12 since there should be no CRC check for  
the destination address and the source address fields. The MAC checks the first offset byte of the  
frame for CRC and checks to determine whether the frame is a wake-up frame. Offset 0 is the first  
byte of the incoming frame's destination address.  
The Filter i CRC-16 register contains the CRC-16 result of the frame that should pass Filter i.  
Table 3.6 describes the Filter i CRC-16 bit fields.  
Table 3.6 Filter i CRC-16 Bit Definitions  
FILTER I CRC-16 DESCRIPTION  
FIELD  
DESCRIPTION  
15:0  
Pattern CRC-16: This field contains the 16-bit CRC value from the pattern and the byte mask  
programmed to the wake-up filter register Function. This value is compared against the CRC  
calculated on the incoming frame, and a match indicates the reception of a wakeup frame.  
Revision 1.5 (07-18-06)  
SMSC LAN9218I  
DATA2S6HEET