16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
Buffer 2:
10-Byte “Data Start Offset”
17-Bytes of payload data
16-Byte “Buffer End Alignment”
Figure 3.14, "TX Example 1" illustrates the TX command structure for this example, and also shows
how data is passed to the TX data FIFO.
Note 3.15 The LAN9217 host bus interface supports 16-bit bus transfers; internally, all data paths are
32-bits wide. Figure 3.14 and Figure 3.15 describe the host write ordering for pairs of
atomic 16-bit transactions.
SMSC LAN9217
51
Revision 1.8 (06-06-07)
DATASHEET