16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
Table 7.6 10BASE-T Transceiver Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Transmitter Peak Differential
Output Voltage
VOUT
2.2
2.5
2.8
V
Note 7.11
Receiver Differential Squelch
Threshold
VDS
300
420
585
mV
Note 7.11 Measured at the line side of the transformer, line replaced by 100Ω (+/- 1%) resistor.
7.6
Clock Circuit
The LAN9217 can accept either a 25MHz crystal (preferred) or a 25 MHz single-ended clock oscillator
(±50 PPM) input. The LAN9217 shares the 25MHz clock oscillator input (CLKIN) with the crystal input
XTAL1/CLKIN (pin 6). If the single-ended clock oscillator method is implemented, XTAL2 should be left
unconnected and CLKIN should be driven with a nominal 0-3.3V clock signal. The input clock duty
cycle is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN9217
crystal input/output signals (XTAL1, XTAL2). See Table 7.7, "LAN9217 Crystal Specifications" for
crystal specifications. Refer to application note AN10.7 - “Parallel Crystal Circuit Input Voltage Control”
for additional information.
Table 7.7 LAN9217 Crystal Specifications
PARAMETER
SYMBOL
MIN
NOM
AT, typ
Fundamental Mode
Parallel Resonant Mode
MAX
UNITS
NOTES
Crystal Cut
Crystal Oscillation Mode
Crystal Calibration Mode
Frequency
Ffund
Ftol
-
-
25.000
-
MHz
PPM
PPM
PPM
PPM
pF
Frequency Tolerance @ 25oC
Frequency Stability Over Temp
Frequency Deviation Over Time
Total Allowable PPM Budget
Shunt Capacitance
-
+/-50
Note 7.12
Note 7.12
Note 7.13
Note 7.14
Ftemp
Fage
-
-
+/-50
-
+/-3 to 5
-
-
-
+/-50
CO
CL
-
7 typ
-
-
Load Capacitance
-
20 typ
pF
Drive Level
PW
R1
0.5
-
-
-
mW
Ohm
oC
Equivalent Series Resistance
Operating Temperature Range
-
-
30
+70
-
0
-
LAN9217 XTAL1/CLKIN Pin
Capacitance
3 typ
pF
Note 7.15
Note 7.15
LAN9217 XTAL2 Pin
Capacitance
-
3 typ
-
pF
Note 7.12 The maximum allowable values for Frequency Tolerance and Frequency Stability are
application dependant. Since any particular application must meet the IEEE +/-50 PPM
Total PPM Budget, the combination of these two values must be approximately +/-45 PPM
(allowing for aging).
SMSC LAN9217
135
Revision 1.8 (06-06-07)
DATASHEET
SMSC [ SMSC CORPORATION ]
