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LAN9217-MT-E2 参数 Datasheet PDF下载

LAN9217-MT-E2图片预览
型号: LAN9217-MT-E2
PDF下载: 下载PDF文件 查看货源
内容描述: 16位高性能单芯片10/100以太网控制器与HP Auto-MDIX的 [16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 134 页 / 1591 K
品牌: SMSC [ SMSC CORPORATION ]
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16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX  
Datasheet  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
2:0  
GPIO Data 0-2 (GPIODn). When enabled as an output, the value written is  
R/W  
000  
reflected on GPIOn. When read, GPIOn reflects the current state of the  
corresponding GPIO pin.  
GPIO0 – bit 0  
GPIO1 – bit 1  
GPIO2 – bit 2  
Table 5.4 EEPROM Enable Bit Definitions  
[22]  
[21]  
[20]  
EEDIO FUNCTION  
EECLK FUNCTION  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
EEDIO  
GPO3  
EECLK  
GPO4  
Reserved  
Reserved  
GPO3  
RX_DV  
TX_EN  
TX_EN  
TX_CLK  
GPO4  
RX_DV  
RX_CLK  
5.3.15  
GPT_CFG-General Purpose Timer Configuration Register  
Offset:  
8Ch  
Size:  
32 bits  
This register configures the General Purpose timer. The GP Timer can be configured to generate host  
interrupts at intervals defined in this register.  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
31-30  
Reserved  
RO  
-
29  
GP Timer Enable (TIMER_EN). When a one is written to this bit the GP  
Timer is put into the run state. When cleared, the GP Timer is halted. On  
the 1 to 0 transition of this bit the GPT_LOAD field will be preset to FFFFh.  
R/W  
0
28-16  
15-0  
Reserved  
RO  
-
General Purpose Timer Pre-Load (GPT_LOAD). This value is pre-loaded  
into the GP-Timer.  
R/W  
FFFFh  
SMSC LAN9217  
Revision 1.5 (07-18-06)  
DATA8S9HEET